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See http://www.infradead.org/rpr.html --=-T6Ugbgmic/er9ZVVGv7j Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2026-11-04 at 11:55 -0800, Sean Christopherson wrote: >=20 > Apparently I suck extra hard at reading today.=C2=A0 I responded to the c= over letter > with basically the same response, and _then_ I saw this.=C2=A0 /facepalm >=20 > At least we're in general agreement.=C2=A0 I've got patch 1 earmarked, so= no need to > resend that one. Cool. And all the atomic-SRCU stuff has landed in 7.4-rc1 too, so I no longer have any great need to split these preliminary cleanups from the real GPC-SRCU work. I'm inclined to send them all together, which gives us fewer things to track =E2=80=94 but I'm happy to do otherwise if you pre= fer. I'd actually pulled in the KVM_XEN_VCPU_ATTR_TYPE_WRITE_HYPERCALL_PAGE thing too, as the retry handling touched that. It's kind of a non- sequitur now, but I'm keeping it in the set anyway unless you object. The preliminary set is now: David Woodhouse (4): KVM: x86/xen: Fill the hypercall page with a single guest write KVM: x86/xen: Add KVM_XEN_VCPU_ATTR_TYPE_WRITE_HYPERCALL_PAGE KVM: x86: Request the guest TLB flush from record_steal_time() KVM: selftests: Actually deactivate the HVA-based shared_info cache i= n xen_shinfo_test Sean Christopherson (3): KVM: x86/xen: Extract delivery of event to vCPU into a separate helpe= r KVM: x86/xen: Explicitly tag "shared info" page as never being dirty = tracked KVM: x86/xen: Don't dirty track "vCPU info" page Followed by the actual GPC conversion to atomic-SRCU: Carsten Stollmaier (1): KVM: x86: Use gfn_to_pfn_cache for steal time / preempted status David Woodhouse (9): KVM: pfncache: Use atomic SRCU for readers instead of a rwlock KVM: pfncache: Add guest-mode pinning (GUEST_USES_PFN successor) KVM: x86: Post KVM_REQ_GET_NESTED_STATE_PAGES on memslot updates KVM: nSVM: Use a gfn_to_pfn_cache for the vmcb12 page KVM: nSVM: Cache L1's MSR permissions map pages KVM: nSVM: Cache L1's IO permissions map pages KVM: selftests: Add nested transition benchmark KVM: selftests: Add Xen evtchn vs memslot-update race test KVM: selftests: Add Xen evtchn vs mmu_notifier race test for HVA cach= es Fred Griffoul (3): KVM: nVMX: Implement cache for L1 MSR bitmap KVM: nVMX: Use pinned pfncache for L1 APIC virtualization pages KVM: selftests: Add nested VMX APIC cache invalidation test --=-T6Ugbgmic/er9ZVVGv7j Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCE8Ew ggWvMIIEl6ADAgECAhANkOKMSmGXhF5eMl0rsRhvMA0GCSqGSIb3DQEBDAUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBHMjAeFw0yNDAzMTMwMDAwMDBaFw0zNDAz MTIyMzU5NTlaMGIxCzAJBgNVBAYTAlVTMRcwFQYDVQQKEw5EaWdpQ2VydCwgSW5jLjE6MDgGA1UE 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