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Thu, 5 Nov 2026 17:02:10 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-ThreadId: A2yf0_aOlh3- Date: Thu, 05 Nov 2026 23:01:40 +0100 From: "Arnd Bergmann" To: "H. Peter Anvin" , "Arnd Bergmann" , "Ingo Molnar" Cc: "Richard Weinberger" , "Anton Ivanov" , "Johannes Berg" , "Thomas Gleixner" , "Borislav Petkov" , "Dave Hansen" , "Peter Zijlstra" , "Will Deacon" , "Boqun Feng" , "Gary Guo" , "Yury Norov" , "Rasmus Villemoes" , "Boris Ostrovsky" , "Alexander Usyskin" , "Anthony L Nguyen" , "Przemek Kitszel" , x86@kernel.org, linux-kernel@vger.kernel.org, linux-um@lists.infradead.org Message-Id: In-Reply-To: <4207CA81-6023-4DFC-8FBF-2C5C8C036CCC@zytor.com> References: <20261105163440.2381661-1-arnd@kernel.org> <20261105163440.2381661-8-arnd@kernel.org> <4207CA81-6023-4DFC-8FBF-2C5C8C036CCC@zytor.com> Subject: Re: [PATCH 7/7] x86: simplify 32-bit instruction set selection Content-Type: text/plain Content-Transfer-Encoding: 7bit On Thu, Nov 5, 2026, at 21:17, H. Peter Anvin wrote: > On November 5, 2026 8:34:38 AM PST, Arnd Bergmann wrote: >>From: Arnd Bergmann >> >>The -march= compiler flags select both instruction set and tuning for >>a particular CPU, which works well when building a kernel that can only >>run on this one type, but has some counterintuitive effects because it >>is not always clear which models are compatible. >> >>E.g. building for Geode LX results in a kernel that can work on all on >>all 686-class CPUs but crashes on CPUs without the CMOV instructions. >>Building a kernel for 686 could work on Geode LX and Crusoe but fails >>because of the CPU generation check that detects these as 585-class. ... > > Crusoe (TM3xxx/TM5xxx) do have a handful of compiler/user space visible > items that are missing from i686, as I recall notably the long nop > instructions and *possibly* fcomi (I *think* we caught that one, but > I'm not 100% sure.) > > As a result, it reports correctly as family 5. I don't know about fcomi, but the P6 long NOP hasn't been used in 32-bit kernels since your 2008 commit 14469a8dd236 ("x86: disable static NOPLs on 32 bits"). From that point, I believe we effectively treated Geode LX and Crusoe as 686-compatible. binutils apparently uses the same definition and emits long nops for -march=pentiumpro but not for -march=i686 in modern versions. You are of course correct that this remains inconsistent: a kernel with CONFIG_MCRUSOE is still built with -march=i686 and CONFIG_X86_MINIMUM_CPU_FAMILY=5, so it will fail to run on 586-class CPUs without CMOV. I'll fold in this patch to make a MCRUSOE kernel actually compatible with all i586-class CPUs, unless you have a better idea: diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu index 1735a5f95d33..9a3a1b1c2452 100644 --- a/arch/x86/Makefile_32.cpu +++ b/arch/x86/Makefile_32.cpu @@ -21,7 +21,7 @@ cflags-$(CONFIG_MK6) += -march=i586 $(call tune,k6) # Please note, that patches that add -march=athlon-xp and friends are pointless. # They make zero difference whatsosever to performance at this time. cflags-$(CONFIG_MK7) += -march=i686 $(call tune,athlon) -cflags-$(CONFIG_MCRUSOE) += -march=i686 $(align) +cflags-$(CONFIG_MCRUSOE) += -march=i586 $(call tune,i686) $(align) cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) $(align) cflags-$(CONFIG_MCYRIXIII) += -march=i586 $(call tune,i486) $(align) cflags-$(CONFIG_MVIAC3_2) += -march=i686 Arnd