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Date: Tue, 15 Jan 2013 14:34:06 -0600 (CST)
From: Aaron Sierra <asierra@xes-inc.com>
To: =?iso-8859-1?Q?Ag=F3cs_P=E1l?= <agocs.pal.86@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>, Samuel Ortiz <sameo@linux.intel.com>,
        Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH] lpc_ich: fix gpio base and control offsets
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> >  #define ACPIBASE_GCS_END	0x3414
> >  
> >  #define GPIOBASE		0x48
> > +#define GPIOBASE_ICH5		0x58
> >  #define GPIOCTRL		0x4C
> > +#define GPIOCTRL_ICH5		0x58
> >  
> >  #define RCBABASE		0xf0
> 
> Aaron,
> A like this corrected patch and a little fix that GPIOCTRL_ICH5 is
> 0x5C
> Is this correct? Thanks!

Yes, of course you're still right about the register offset. Sorry for merging poorly.

-Aaron