Re: [PATCH V2] irqchip/gic-v3-its: Reclaim the dangling bits in LPI maps

["liaochang (A)" <liaochang1@huawei.com>]

Marc, thanks for comment.

在 2022/9/6 1:21, Marc Zyngier 写道:
> On Wed, 31 Aug 2022 03:33:32 +0100,
> Liao Chang <liaochang1@huawei.com> wrote:
>>
>> Following interrupt allocation process leads to some interrupts are
>> mapped in the low-level domain(Arm ITS), but they have never mapped
>> at the higher level.
>>
>> irq_domain_alloc_irqs_hierarchy(.., nr_irqs, ...)
>>   its_irq_domain_alloc(..., nr_irqs, ...)
>>     its_alloc_device_irq(..., nr_irqs, ...)
>>       bitmap_find_free_region(..., get_count_order(nr_irqs))
>>
>> Since ITS domain finds a region of zero bits, the length of which must
>> aligned to the power of two. If nr_irqs is 30, the length of zero bits
>> is actually 32, but the first 30 bits are really mapped.
>>
>> On teardown, the low-level domain only free these interrupts that
>> actually mapped, and leave last interrupts dangling in the ITS domain.
>> Thus the ITS device resources are never freed. On device driver reload,
>> dangling interrupts prevent ITS domain from allocating enough resource.
>>
>> irq_domain_free_irqs_hierarchy(..., nr_irqs, ...)
>>   its_irq_domain_free(..., irq_base + i, 1)
>>     bitmap_release_region(..., irq_base + i, get_count_order(1))
>>
>> John reported this problem to LKML and Marc provided a solution and fix
>> it in the generic code, see the discussion from Link tag. Marc's patch
>> fix John's problem, but does not take care of some corner case, look one
>> example below.
>>
>> Step1: 32 interrupts allocated in LPI domain, but return the first 30 to
>> higher driver.
>>
>>    111111111111111111111111111111 11
>>   |<------------0~29------------>|30,31|
>>
>> Step2: interrupt #16~28 are released one by one, then #0~15 and #29~31
>> still be there.
>>
>>    1111111111111111 0000000000000 1  11
>>   |<-----0~15----->|<---16~28--->|29|30,31|
>>
>> Step#: on driver teardown, generic code will invoke ITS domain code
>> twice. The first time, #0~15 will be released, the second one, only #29
>> will be released(1 align to power of two).
>>
>>    0000000000000000 0000000000000 0  11
>>   |<-----0~15----->|<---16~28--->|29|30,31|
> 
> Which driver is doing this? This really looks like a driver bug to
> only free a portion of its MSI allocation, and that's definitely not
> something that is commonly done.

Yes, this scenario is manipulated. I use this example to prove why current ITS
allocation is buggy, that is the number of interrupt driver is about to release
have to be equal with the number of allocation **last time**, even though the total
number is same, pesudo code below reflects this problem.

[Correct usage]
virq = irq_domain_alloc_irqs(...,0,30,...)  // 32 bits are allocated actually.
irq_domain_free_irqs(virq, 30)    // 32 bits are released actually.

[Incorrect usage]
virq = irq_domain_alloc_irqs(...,0,30,...)
for(i = 0; i < 30; i++)
	irq_domain_free_irqs(virq + i, 1)
// driver release 30 irq, but last 2 bits are dangling due to alignment.

> 
> Even worse, this can result in some LPIs being released behind the
> driver's back, exactly due to this power-of-two alignment.
> 
> It seems to me that you are trying to solve a problem that only exists
> for a buggy driver. Please point me to the upstream code that has such
> behaviour and explain why this can't be fixed in that driver itself.

I indeed find no upstream code has such buggy behaviour, thanks for pointing out
this important and undocumented rule, it is very helpful to me, please ignore this
patch.

> 
> Thanks,
> 
> 	M.
> 

-- 
BR,
Liao, Chang