From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D733A3BBFDA for ; Sun, 2 Aug 2026 16:14:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785687243; cv=none; b=iojWz/p3fSwFDf+wnteXyOOaweRQSOZpcTF0eUxcdxm7ceDxL8sRyRdl2BvoW++NLX5oujtNvq0c6IyJoqk0ju1v/EK9sRhNYpgMxVrD7cleDOb/SrOuYjINO0jgb6PsdO3iHGRkCMvy8ZI1aU0kiJMucnyKP39B3Yoead2GN3A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785687243; c=relaxed/simple; bh=JZVDI8rQQNrSuW3rNZU7HK8LyVLJcjOSm2JNI1nIBA8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BoLoOsIcCuY/LPqlEg+xC11pkiJdKRbiNGCamEahBH7rXFTZePtAnOzU9HemB6AW2JTB1/GfTev1tvpY4c/Vjeh+jA17CmTMDFrYZak5CM70HXZJTUhLv9v7AEiThSVLSZTeVBm4v2AYfejQF85Mc5KkzjZ+MuZtKgvXdL4NpQI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KepeybP5; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KepeybP5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1785687241; x=1817223241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JZVDI8rQQNrSuW3rNZU7HK8LyVLJcjOSm2JNI1nIBA8=; b=KepeybP5TWDRHNrZW2qWknLUqXnmbO7d9nwBUviF9DMNYshpSZXGnXlA 7W5HVlb6y86DarvDQnmyzwAA3exCBX2EsSXDDk7y66y8565lhyJqzXGJz TWTJJIOKt9KWgEvkPgcoR35EDFJ9S8hx/nEyojbxEYr+LdWJPa/3oBJpc ozCm+LutE3GdmIEJ8PO+rRJi8Zm59o9B5/4GDmXqKokaxrKbttpz1PB4p pk+mkNMZiKSCNCa1SZnE3Bj15mdJcRHPvuj7jGQ3PR2ARJwlMwMoUpIru rKI3Z3PEFwN/gMKavFOYaQ4bQxt5tKhiqLdZtDLZcmGp8HiOcM5H/WNrn Q==; X-CSE-ConnectionGUID: 6dYMjXBoQZynZ8wGcIflNQ== X-CSE-MsgGUID: xuameRNySRa+QSiTAoHfCQ== X-IronPort-AV: E=McAfee;i="6800,10657,11863"; a="97612273" X-IronPort-AV: E=Sophos;i="6.25,200,1779174000"; d="scan'208";a="97612273" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Aug 2026 09:14:00 -0700 X-CSE-ConnectionGUID: gKlyzciEQBC7a9FRuE5hTA== X-CSE-MsgGUID: w/DMpGcaSHq4WPnd03KPPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,200,1779174000"; d="scan'208";a="261068112" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by orviesa007.jf.intel.com with ESMTP; 02 Aug 2026 09:13:57 -0700 From: Chen Yu To: Reinette Chatre , Tony Luck Cc: Ben Horgan , "James Morse" , Dave Martin , Babu Moger , Fenghua Yu , Borislav Petkov , Thomas Gleixner , "Dave Hansen" , Peter Newman , chen.yu@linux.dev, x86@kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 08/31] x86/resctrl: Introduce erdt_cpu_has() and erdt_support() Date: Mon, 3 Aug 2026 00:04:15 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce erdt_cpu_has() to verify if a specific RDT feature is backed by an ERDT table. erdt_cpu_has() is derived from rdt_cpu_has(), which not only considers firmware (ERDT table and its sub-tables) support for an event, but also considers userspace input like "rdt=!cmt". Similar to rdt_cpu_has(), erdt_cpu_has() expects an x86 feature flag as parameter. Introduce erdt_support() as a helper called by erdt_cpu_has() to check whether the ERDT firmware supports a given feature. erdt_support() deliberately claims no feature yet and returns false. A feature may only be reported as ERDT backed once the low level accessors that read its monitoring data via MMIO exist, otherwise callers would take the ERDT path and find no implementation behind it. Features are added to erdt_support() as their MMIO implementations are introduced. Tested-by: Hongyu Ning Signed-off-by: Chen Yu --- arch/x86/include/asm/resctrl.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 23 +++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/erdt.c | 5 +++++ arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ 4 files changed, 31 insertions(+) diff --git a/arch/x86/include/asm/resctrl.h b/arch/x86/include/asm/resctrl.h index e60c2aea7ebd..5491853113dd 100644 --- a/arch/x86/include/asm/resctrl.h +++ b/arch/x86/include/asm/resctrl.h @@ -49,6 +49,7 @@ DECLARE_STATIC_KEY_FALSE(rdt_enable_key); DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key); DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); +bool erdt_cpu_has(int flag); int erdt_get_scale(void); static inline bool resctrl_arch_alloc_capable(void) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 4e2922ec1dda..5a56966103f2 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -1021,6 +1021,29 @@ bool rdt_cpu_has(int flag) return ret; } +bool erdt_cpu_has(int flag) +{ + struct rdt_options *o; + bool ret; + + ret = erdt_support(flag); + + if (!ret) + return ret; + + for (o = rdt_options; o < &rdt_options[NUM_RDT_OPTIONS]; o++) { + if (flag == o->flag) { + if (o->force_off) + ret = false; + if (o->force_on) + ret = true; + break; + } + } + + return ret; +} + bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) { if (!rdt_cpu_has(X86_FEATURE_BMEC)) diff --git a/arch/x86/kernel/cpu/resctrl/erdt.c b/arch/x86/kernel/cpu/resctrl/erdt.c index 422618991927..167d2dfc368d 100644 --- a/arch/x86/kernel/cpu/resctrl/erdt.c +++ b/arch/x86/kernel/cpu/resctrl/erdt.c @@ -37,6 +37,11 @@ static int erdt_max_rmid; /* Scale to bytes for the monitoring counters when ERDT is enabled. */ static int erdt_scale; +bool erdt_support(int flag) +{ + return false; +} + int erdt_get_max_rmid(void) { return erdt_max_rmid; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 4779f54b0c84..ee1990302177 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -305,6 +305,8 @@ static inline void intel_aet_mon_domain_setup(int cpu, int id, struct rdt_resour static inline bool intel_handle_aet_option(bool force_off, char *tok) { return false; } #endif +bool erdt_support(int flag); +bool erdt_cpu_has(int flag); int erdt_get_max_rmid(void); int erdt_init(void); void erdt_exit(void); -- 2.43.0