From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753648AbdEQHgU (ORCPT ); Wed, 17 May 2017 03:36:20 -0400 Received: from regular1.263xmail.com ([211.150.99.133]:57349 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753581AbdEQHgP (ORCPT ); Wed, 17 May 2017 03:36:15 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: frank.wang@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: frank.wang@rock-chips.com X-UNIQUE-TAG: <097f4731b225c35ed4bc8d2aecac5331> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 2/3] arm: dts: rk322x: correct uart2 pinctrl and add another sets To: Kever Yang Cc: heiko@sntech.de, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, huangtao@rock-chips.com, devicetree@vger.kernel.org, charles.chen@rock-chips.com, wmc@rock-chips.com, kevan.lan@rock-chips.com, linux-kernel@vger.kernel.org, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, cody.xie@rock-chips.com, linux-arm-kernel@lists.infradead.org References: <1494992451-32542-1-git-send-email-frank.wang@rock-chips.com> <1494992451-32542-3-git-send-email-frank.wang@rock-chips.com> <3974d438-89ca-04e2-03cd-6d3946dd461e@163.com> From: Frank Wang Message-ID: Date: Wed, 17 May 2017 15:35:42 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 In-Reply-To: <3974d438-89ca-04e2-03cd-6d3946dd461e@163.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kever, On 2017/5/17 14:31, Kever Yang wrote: > Hi Frank, > > > On 05/17/2017 11:40 AM, Frank Wang wrote: >> Correct UART2 PINCTRL flag and add another PINCTRL sets for UART2 >> in case of confict with SDMMC. >> >> Signed-off-by: Frank Wang >> --- >> arch/arm/boot/dts/rk322x.dtsi | 11 +++++++++-- >> 1 file changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/boot/dts/rk322x.dtsi >> b/arch/arm/boot/dts/rk322x.dtsi >> index cc6a27d..ea1239a 100644 >> --- a/arch/arm/boot/dts/rk322x.dtsi >> +++ b/arch/arm/boot/dts/rk322x.dtsi >> @@ -222,7 +222,7 @@ >> clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; >> clock-names = "baudclk", "apb_pclk"; >> pinctrl-names = "default"; >> - pinctrl-0 = <&uart2_xfer>; >> + pinctrl-0 = <&uart21_xfer>; > > There are more than one group of UART in rk322x, maybe we need to move > or add this setting in the dts file to override dtsi setting? > That makes sense, I will delete above change in next version and overwrite it in dts file later. BR. Frank > Thanks, > - Kever >> reg-shift = <2>; >> reg-io-width = <4>; >> status = "disabled"; >> @@ -693,7 +693,7 @@ >> uart2 { >> uart2_xfer: uart2-xfer { >> - rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>, >> + rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>, >> <1 19 RK_FUNC_2 &pcfg_pull_none>; >> }; >> @@ -705,5 +705,12 @@ >> rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>; >> }; >> }; >> + >> + uart2-1 { >> + uart21_xfer: uart21-xfer { >> + rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>, >> + <1 9 RK_FUNC_2 &pcfg_pull_none>; >> + }; >> + }; >> }; >> }; > > > > >