From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968821AbdEYIDa (ORCPT ); Thu, 25 May 2017 04:03:30 -0400 Received: from mail-lf0-f42.google.com ([209.85.215.42]:35334 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968795AbdEYIDY (ORCPT ); Thu, 25 May 2017 04:03:24 -0400 Subject: Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: add hi8435 device To: Shawn Guo References: <20170522131010.3537-1-nikita.yoush@cogentembedded.com> <076f6258-f0b4-6ba5-9670-e2c0582a92b5@cogentembedded.com> <20170522182119.GN29447@lunn.ch> <486f703b-fc8a-ccc1-134d-a908df798b2e@cogentembedded.com> <20170525071940.GV26102@dragon> Cc: Andrew Lunn , Stefan Agner , Mark Rutland , devicetree@vger.kernel.org, Jeff White , Russell King , linux-kernel@vger.kernel.org, Rob Herring , Jonathan Cameron , Sascha Hauer , Vladimir Barinov , linux-arm-kernel@lists.infradead.org, Chris Healy From: Nikita Yushchenko X-Enigmail-Draft-Status: N1110 Message-ID: Date: Thu, 25 May 2017 11:03:20 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170525071940.GV26102@dragon> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >> "Crap origin" here is that in vast majority of cases, polarity is >> per-chip, not per-chip-use, knowledge. And proper location for per-chip >> knowledge is chip's driver. Moving this knowledge to per-chip-use >> location in device trees only provides a source for errors, with little >> gain. >> >> Vladimir Barinov mentions possibility that signal can be inverted by >> board between gpio provider and chip's pin ... but do we have at least >> one practical case of this? And if we even do, it's quite uncommon, and >> something special should be required in device tree for these special >> cases and not for "normal" cases. > > I disagree. Not for hi8435, but I have seen quite some board designs > invert GPIOs before getting them into board level components. That's > why we should define those xxx-gpios properties on board level DTS, > where polarity can be chosen per board design. Even if such, still board specific knowledge is "is gpio as-is or inverted", but knowledge if chip expects signal to be active low or active high, remains chip-specific. I'm thinking of proposing new flags in gpio binding, say GPIO_NATIVE_POLARITY / GPIO_INVERTED_POLARITY, that could be used instead of GPIO_ACTIVE_HIGH / GPIO_ACTIVE_LOW, and leave knowledge about signal polarity to chip's driver, while still allow to describe inversion of needed. Nikita