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([2001:b07:6468:f312:3c1c:ffba:c624:29b8]) by smtp.gmail.com with ESMTPSA id a10sm3149808wmf.46.2020.05.27.09.10.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 May 2020 09:10:37 -0700 (PDT) Subject: Re: [PATCH RFCv2 0/9] kvm/arm64: Support Async Page Fault To: Marc Zyngier , Gavin Shan Cc: Mark Rutland , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, suzuki.poulose@arm.com, drjones@redhat.com, eric.auger@redhat.com, aarcange@redhat.com, shan.gavin@gmail.com References: <20200508032919.52147-1-gshan@redhat.com> <20200526130927.GH1363@C02TD0UTHF1T.local> <987785b2-2533-c3d8-8f6a-4193aa82d502@redhat.com> From: Paolo Bonzini Message-ID: Date: Wed, 27 May 2020 18:10:33 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27/05/20 09:48, Marc Zyngier wrote: > > My own question is whether this even makes any sense 10 years later. > The HW has massively changed, and this adds a whole lot of complexity > to both the hypervisor and the guest. It still makes sense, but indeed it's for different reasons. One example is host page cache sharing, where (parts of) the host page cache are visible to the guest. In this context, async page faults are used for any kind of host page faults, not just paging out memory due to overcommit. But I agree that it is very very important to design the exception model first, as we're witnessing in x86 land the problems with a poor design. Nothing major, but just pain all around. Paolo > It also plays very ugly games > with the exception model, which doesn't give me the warm fuzzy feeling > that it's going to be great.