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Tue, 11 Nov 2025 08:39:29 -0800 (PST) Received: from [192.168.10.81] ([176.206.111.214]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4775cdc33c8sm376226375e9.2.2025.11.11.08.39.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Nov 2025 08:39:28 -0800 (PST) Message-ID: Date: Tue, 11 Nov 2025 17:39:26 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC v1 14/20] KVM: x86: Emulate REX2-prefixed 64-bit absolute jump To: "Chang S. Bae" , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: seanjc@google.com, chao.gao@intel.com, zhao1.liu@intel.com References: <20251110180131.28264-1-chang.seok.bae@intel.com> <20251110180131.28264-15-chang.seok.bae@intel.com> From: Paolo Bonzini Content-Language: en-US Autocrypt: addr=pbonzini@redhat.com; keydata= xsEhBFRCcBIBDqDGsz4K0zZun3jh+U6Z9wNGLKQ0kSFyjN38gMqU1SfP+TUNQepFHb/Gc0E2 CxXPkIBTvYY+ZPkoTh5xF9oS1jqI8iRLzouzF8yXs3QjQIZ2SfuCxSVwlV65jotcjD2FTN04 hVopm9llFijNZpVIOGUTqzM4U55sdsCcZUluWM6x4HSOdw5F5Utxfp1wOjD/v92Lrax0hjiX DResHSt48q+8FrZzY+AUbkUS+Jm34qjswdrgsC5uxeVcLkBgWLmov2kMaMROT0YmFY6A3m1S P/kXmHDXxhe23gKb3dgwxUTpENDBGcfEzrzilWueOeUWiOcWuFOed/C3SyijBx3Av/lbCsHU Vx6pMycNTdzU1BuAroB+Y3mNEuW56Yd44jlInzG2UOwt9XjjdKkJZ1g0P9dwptwLEgTEd3Fo UdhAQyRXGYO8oROiuh+RZ1lXp6AQ4ZjoyH8WLfTLf5g1EKCTc4C1sy1vQSdzIRu3rBIjAvnC tGZADei1IExLqB3uzXKzZ1BZ+Z8hnt2og9hb7H0y8diYfEk2w3R7wEr+Ehk5NQsT2MPI2QBd wEv1/Aj1DgUHZAHzG1QN9S8wNWQ6K9DqHZTBnI1hUlkp22zCSHK/6FwUCuYp1zcAEQEAAc0j UGFvbG8gQm9uemluaSA8cGJvbnppbmlAcmVkaGF0LmNvbT7CwU0EEwECACMFAlRCcBICGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRB+FRAMzTZpsbceDp9IIN6BIA0Ol7MoB15E 11kRz/ewzryFY54tQlMnd4xxfH8MTQ/mm9I482YoSwPMdcWFAKnUX6Yo30tbLiNB8hzaHeRj jx12K+ptqYbg+cevgOtbLAlL9kNgLLcsGqC2829jBCUTVeMSZDrzS97ole/YEez2qFpPnTV0 VrRWClWVfYh+JfzpXmgyhbkuwUxNFk421s4Ajp3d8nPPFUGgBG5HOxzkAm7xb1cjAuJ+oi/K CHfkuN+fLZl/u3E/fw7vvOESApLU5o0icVXeakfSz0LsygEnekDbxPnE5af/9FEkXJD5EoYG SEahaEtgNrR4qsyxyAGYgZlS70vkSSYJ+iT2rrwEiDlo31MzRo6Ba2FfHBSJ7lcYdPT7bbk9 AO3hlNMhNdUhoQv7M5HsnqZ6unvSHOKmReNaS9egAGdRN0/GPDWr9wroyJ65ZNQsHl9nXBqE AukZNr5oJO5vxrYiAuuTSd6UI/xFkjtkzltG3mw5ao2bBpk/V/YuePrJsnPFHG7NhizrxttB nTuOSCMo45pfHQ+XYd5K1+Cv/NzZFNWscm5htJ0HznY+oOsZvHTyGz3v91pn51dkRYN0otqr bQ4tlFFuVjArBZcapSIe6NV8C4cEiSTOwE0EVEJx7gEIAMeHcVzuv2bp9HlWDp6+RkZe+vtl KwAHplb/WH59j2wyG8V6i33+6MlSSJMOFnYUCCL77bucx9uImI5nX24PIlqT+zasVEEVGSRF m8dgkcJDB7Tps0IkNrUi4yof3B3shR+vMY3i3Ip0e41zKx0CvlAhMOo6otaHmcxr35sWq1Jk tLkbn3wG+fPQCVudJJECvVQ//UAthSSEklA50QtD2sBkmQ14ZryEyTHQ+E42K3j2IUmOLriF dNr9NvE1QGmGyIcbw2NIVEBOK/GWxkS5+dmxM2iD4Jdaf2nSn3jlHjEXoPwpMs0KZsgdU0pP JQzMUMwmB1wM8JxovFlPYrhNT9MAEQEAAcLBMwQYAQIACQUCVEJx7gIbDAAKCRB+FRAMzTZp sadRDqCctLmYICZu4GSnie4lKXl+HqlLanpVMOoFNnWs9oRP47MbE2wv8OaYh5pNR9VVgyhD OG0AU7oidG36OeUlrFDTfnPYYSF/mPCxHttosyt8O5kabxnIPv2URuAxDByz+iVbL+RjKaGM GDph56ZTswlx75nZVtIukqzLAQ5fa8OALSGum0cFi4ptZUOhDNz1onz61klD6z3MODi0sBZN Aj6guB2L/+2ZwElZEeRBERRd/uommlYuToAXfNRdUwrwl9gRMiA0WSyTb190zneRRDfpSK5d usXnM/O+kr3Dm+Ui+UioPf6wgbn3T0o6I5BhVhs4h4hWmIW7iNhPjX1iybXfmb1gAFfjtHfL xRUr64svXpyfJMScIQtBAm0ihWPltXkyITA92ngCmPdHa6M1hMh4RDX+Jf1fiWubzp1voAg0 JBrdmNZSQDz0iKmSrx8xkoXYfA3bgtFN8WJH2xgFL28XnqY4M6dLhJwV3z08tPSRqYFm4NMP dRsn0/7oymhneL8RthIvjDDQ5ktUjMe8LtHr70OZE/TT88qvEdhiIVUogHdo4qBrk41+gGQh b906Dudw5YhTJFU3nC6bbF2nrLlB4C/XSiH76ZvqzV0Z/cAMBo5NF/w= In-Reply-To: <20251110180131.28264-15-chang.seok.bae@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/10/25 19:01, Chang S. Bae wrote: > Add support for the new absolute jump, previously unimplemented. > > This instruction has an unusual quirk: the REX2.W bit uses inverted > polarity. Unlike normal REX or REX2 semantics (where W=1 indicates a > 64-bit operand size), this instruction uses W=0 to select an 8-byte > operand size. > > The new InvertedWidthPolarity flag and its helper to interpret the > W bit correctly, avoiding special-case hacks in the emulator logic. > > Since the ctxt->op_bytes depends on the instruction flags, the size > should be determined after the instruction lookup. > > Signed-off-by: Chang S. Bae I think this is not needed. Emulation of non-memory operations, in practice, is only needed to support big real mode on very old processors. We can just add a NoRex bit and apply it to the six reows you touch in patch 13. Paolo > --- > arch/x86/kvm/emulate.c | 27 ++++++++++++++++++++------- > 1 file changed, 20 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c > index 58879a31abcd..03f8e007b14e 100644 > --- a/arch/x86/kvm/emulate.c > +++ b/arch/x86/kvm/emulate.c > @@ -179,6 +179,7 @@ > #define TwoMemOp ((u64)1 << 55) /* Instruction has two memory operand */ > #define IsBranch ((u64)1 << 56) /* Instruction is considered a branch. */ > #define ShadowStack ((u64)1 << 57) /* Instruction affects Shadow Stacks. */ > +#define InvertedWidthPolarity ((u64)1 << 58) /* Instruction uses inverted REX2.W polarity */ > > #define DstXacc (DstAccLo | SrcAccHi | SrcWrite) > > @@ -993,6 +994,16 @@ EM_ASM_2W(btc); > > EM_ASM_2R(cmp, cmp_r); > > +static inline bool is_64bit_operand_size(struct x86_emulate_ctxt *ctxt) > +{ > + /* > + * Most instructions interpret REX.W=1 as 64-bit operand size. > + * Some REX2 opcodes invert this logic. > + */ > + return ctxt->d & InvertedWidthPolarity ? > + ctxt->rex.bits.w == 0 : ctxt->rex.bits.w == 1; > +} > + > static int em_bsf_c(struct x86_emulate_ctxt *ctxt) > { > /* If src is zero, do not writeback, but update flags */ > @@ -2472,7 +2483,7 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt) > > setup_syscalls_segments(&cs, &ss); > > - if (ctxt->rex.bits.w) > + if (is_64bit_operand_size(ctxt)) > usermode = X86EMUL_MODE_PROT64; > else > usermode = X86EMUL_MODE_PROT32; > @@ -4486,7 +4497,8 @@ static struct opcode rex2_opcode_table[256] __ro_after_init; > static struct opcode rex2_twobyte_table[256] __ro_after_init; > > static const struct opcode undefined = D(Undefined); > -static const struct opcode notimpl = N; > +static const struct opcode pfx_d5_a1 = I(SrcImm64 | NearBranch | IsBranch | InvertedWidthPolarity, \ > + em_jmp_abs); > > #undef D > #undef N > @@ -4543,6 +4555,7 @@ static bool is_ibt_instruction(struct x86_emulate_ctxt *ctxt) > return true; > case SrcNone: > case SrcImm: > + case SrcImm64: > case SrcImmByte: > /* > * Note, ImmU16 is used only for the stack adjustment operand on ENTER > @@ -4895,9 +4908,6 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int > > done_prefixes: > > - if (ctxt->rex.bits.w) > - ctxt->op_bytes = 8; > - > /* Determine opcode byte(s): */ > if (ctxt->rex_prefix == REX2_INVALID) { > /* > @@ -4936,6 +4946,9 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int > } > ctxt->d = opcode.flags; > > + if (is_64bit_operand_size(ctxt)) > + ctxt->op_bytes = 8; > + > if (ctxt->d & ModRM) > ctxt->modrm = insn_fetch(u8, ctxt); > > @@ -5594,6 +5607,6 @@ void __init kvm_init_rex2_opcode_table(void) > undefine_row(&rex2_twobyte_table[0x30]); > undefine_row(&rex2_twobyte_table[0x80]); > > - /* Mark opcode not yet implemented: */ > - rex2_opcode_table[0xa1] = notimpl; > + /* Define the REX2-specific absolute jump (0xA1) opcode */ > + rex2_opcode_table[0xa1] = pfx_d5_a1; > }