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Mon, 12 Jan 2026 02:26:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IH+ANrmd2jJbJqGD/KN4Ur1v32NLxLtT8THnNV3HiNqENG8f9th3rPAV/+1T/5XthSjPUXwPA== X-Received: by 2002:a17:902:f684:b0:2a0:de67:9704 with SMTP id d9443c01a7336-2a3edb739dbmr159952875ad.19.1768213563708; Mon, 12 Jan 2026 02:26:03 -0800 (PST) Received: from [10.217.217.147] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3e3cc7912sm173476745ad.67.2026.01.12.02.26.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jan 2026 02:26:03 -0800 (PST) Message-ID: Date: Mon, 12 Jan 2026 15:55:59 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] clk: qcom: dispcc-glymur: use RCG2 ops for DPTX1 AUX clock source To: Dmitry Baryshkov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260112-dp-aux-clks-v1-0-456b0c11b069@oss.qualcomm.com> <20260112-dp-aux-clks-v1-1-456b0c11b069@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <20260112-dp-aux-clks-v1-1-456b0c11b069@oss.qualcomm.com> Content-Type: text/plain; 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Use shared RCG2 ops for dptx1_aux_clk_src, the same > as all other DPTX AUX clocks in this driver. > > Fixes: b4d15211c408 ("clk: qcom: dispcc-glymur: Add support for Display Clock Controller") > Signed-off-by: Dmitry Baryshkov > --- > drivers/clk/qcom/dispcc-glymur.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/dispcc-glymur.c b/drivers/clk/qcom/dispcc-glymur.c > index 5203fa6383f6..f352165bf56f 100644 > --- a/drivers/clk/qcom/dispcc-glymur.c > +++ b/drivers/clk/qcom/dispcc-glymur.c > @@ -417,7 +417,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { > .parent_data = disp_cc_parent_data_1, > .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), > .flags = CLK_SET_RATE_PARENT, > - .ops = &clk_dp_ops, > + .ops = &clk_rcg2_shared_ops, > }, > }; > > Reviewed-by: Taniya Das -- Thanks, Taniya Das