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Sat, 15 Feb 2025 00:25:22 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51F0P9jZ026595 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 15 Feb 2025 00:25:09 GMT Received: from [10.134.70.212] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 16:25:08 -0800 Message-ID: Date: Fri, 14 Feb 2025 16:25:08 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 04/15] drm/msm/dpu: polish log for resource allocation Content-Language: en-US To: Jun Nie , Rob Clark , "Abhinav Kumar" , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" CC: , , , References: <20250118-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-33-v5-0-9701a16340da@linaro.org> <20250118-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-33-v5-4-9701a16340da@linaro.org> From: Jessica Zhang In-Reply-To: <20250118-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-33-v5-4-9701a16340da@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: DQwPNJp53HyA9lhgnHy5aU4wIlgncz6v X-Proofpoint-ORIG-GUID: DQwPNJp53HyA9lhgnHy5aU4wIlgncz6v X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_10,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 adultscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 spamscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502150002 On 1/17/2025 8:00 AM, Jun Nie wrote: > It is more likely that resource allocation may fail in complex usage > case, such as quad-pipe case, than existing usage cases. > A resource type ID is printed on failure in the current implementation, > but the raw ID number is not explicit enough to help easily understand > which resource caused the failure, so add a table to match the type ID > to an human readable resource name and use it in the error print. > > Signed-off-by: Jun Nie Reviewed-by: Jessica Zhang > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++++++++++++++++++---- > 1 file changed, 19 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > index a67ad58acd99f..24e085437039e 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > @@ -802,6 +802,21 @@ void dpu_rm_release_all_sspp(struct dpu_global_state *global_state, > ARRAY_SIZE(global_state->sspp_to_crtc_id), crtc_id); > } > > +static char *dpu_hw_blk_type_name[] = { > + [DPU_HW_BLK_TOP] = "TOP", > + [DPU_HW_BLK_SSPP] = "SSPP", > + [DPU_HW_BLK_LM] = "LM", > + [DPU_HW_BLK_CTL] = "CTL", > + [DPU_HW_BLK_PINGPONG] = "pingpong", > + [DPU_HW_BLK_INTF] = "INTF", > + [DPU_HW_BLK_WB] = "WB", > + [DPU_HW_BLK_DSPP] = "DSPP", > + [DPU_HW_BLK_MERGE_3D] = "merge_3d", > + [DPU_HW_BLK_DSC] = "DSC", > + [DPU_HW_BLK_CDM] = "CDM", > + [DPU_HW_BLK_MAX] = "unknown", > +}; > + > /** > * dpu_rm_get_assigned_resources - Get hw resources of the given type that are > * assigned to this encoder > @@ -862,13 +877,13 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, > continue; > > if (num_blks == blks_size) { > - DPU_ERROR("More than %d resources assigned to enc %d\n", > - blks_size, enc_id); > + DPU_ERROR("More than %d %s assigned to enc %d\n", > + blks_size, dpu_hw_blk_type_name[type], enc_id); > break; > } > if (!hw_blks[i]) { > - DPU_ERROR("Allocated resource %d unavailable to assign to enc %d\n", > - type, enc_id); > + DPU_ERROR("%s unavailable to assign to enc %d\n", > + dpu_hw_blk_type_name[type], enc_id); > break; > } > blks[num_blks++] = hw_blks[i]; > > -- > 2.34.1 >