From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBFEE3596E for ; Fri, 27 Dec 2024 07:16:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.35 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735283821; cv=none; b=NOptZXwHqVSkJozYjD/rD3K3RmgvsM28G+T3QrhohVWls1XBwwvQB8fyw11pmmCgFxd5ZBbOzhoRQdL1Necl6Xlpmq5qMfPgBkR6iqrYRc0amrx/wY9mJ0WBRFwax/R1+s189JL/QEWMsZOJfMTB2UUb0AQC8vBWHzmz2FjLkyI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735283821; c=relaxed/simple; bh=t/iITXSBD02MSi7PuBRCpy5YItoh1Rr6ctCM8fvHzxg=; h=CC:Subject:To:References:From:Message-ID:Date:MIME-Version: In-Reply-To:Content-Type; b=B4uKmt3iCBLcsYxwGq1H2x5kHnUKboFEc0tlod71MClLK6rhxua29ryT8dsWRh8rfyNHIxMpPJ8NTzby3ogvdkRoLqTeYFPcoUlKUbDYcRXBgcew4fQElto1JxUOL+AwwIu2bq3udj6orw1/ziSahm55OIDHYynH8m8D4bqePhY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.35 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4YKGvG3K8mz1T7Vc; Fri, 27 Dec 2024 15:14:02 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 0058A1A016C; Fri, 27 Dec 2024 15:16:49 +0800 (CST) Received: from [10.67.121.177] (10.67.121.177) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Fri, 27 Dec 2024 15:16:47 +0800 CC: , , , , , , , , , , , , , , , , , , , , , , , , , Nysal Jan K.A. Subject: Re: [PATCH v10 0/4] Support SMT control on arm64 To: Shrikanth Hegde References: <20241220075313.51502-1-yangyicong@huawei.com> <04c9757c-98e9-4c5d-9759-8a9ac9d6a803@linux.ibm.com> From: Yicong Yang Message-ID: Date: Fri, 27 Dec 2024 15:16:47 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <04c9757c-98e9-4c5d-9759-8a9ac9d6a803@linux.ibm.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemd200014.china.huawei.com (7.221.188.8) On 2024/12/26 20:28, Shrikanth Hegde wrote: > > > On 12/26/24 17:20, Yicong Yang wrote: >> On 2024/12/26 17:23, Shrikanth Hegde wrote: >>> >>> >>> On 12/20/24 13:23, Yicong Yang wrote: >>>> From: Yicong Yang >>>> >>>> The core CPU control framework supports runtime SMT control which >>>> is not yet supported on arm64. Besides the general vulnerabilities >>>> concerns we want this runtime control on our arm64 server for: >>>> >>>> - better single CPU performance in some cases >>>> - saving overall power consumption >>>> >>> >>> EAS is disabled when SMT is present. >>> I am curious to know how power saving happens here. >> >> EAS shouldn't work on non-asymmetic systems, so it's not the case here. > > Ok. so this is a symmetric system then? yes, symmetric. > >> System wide power consumption comes down from the CPU offlining here. >> > > Ok. So SMT is enabled by default and then at runtime disable it to save power by off-lining the sibling threads? > yes. > > Note: When enabling SMT, current behavior differs when a core is fully offline on different archs. You may want to see which is behavior you need in that case. i.e either online or skip. > > PowerPC change where we are skipping a fully offline core. > https://lore.kernel.org/all/20240731030126.956210-1-nysal@linux.ibm.com/ > Thanks for the information! Currently it's implemented as online and no special need for skip. We may need further support if skip is required in the future, currently for GENERIC_ARCH_TOPOLOGY an offline CPU's thread sibling only contains itself so there's no information for checking whether the whole core is offline or not. Thanks. >> Thanks. >> >>> >>>> This patchset implements it in the following aspects: >>>> >>>> - Provides a default topology_is_primary_thread() >>>> - support retrieve SMT thread number on OF based system >>>> - support retrieve SMT thread number on ACPI based system >>>> - select HOTPLUG_SMT for arm64 >>>> >>>> Tests has been done on our ACPI based arm64 server and on ACPI/OF\ >>>> based QEMU VMs. >>>> >>> . > > .