From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Jie Gan <jie.gan@oss.qualcomm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Tao Zhang <tao.zhang@oss.qualcomm.com>
Subject: Re: [PATCH v5 3/3] coresight: tpda: add sysfs node to flush specific port
Date: Fri, 19 Dec 2025 10:33:19 +0000 [thread overview]
Message-ID: <ec3804b5-30a1-404b-ae82-0b606a8b5d6a@arm.com> (raw)
In-Reply-To: <20251219-add_sysfs_nodes_to_configure_tpda-v5-3-ca93ddfe9d30@oss.qualcomm.com>
On 19/12/2025 10:04, Jie Gan wrote:
> From: Tao Zhang <tao.zhang@oss.qualcomm.com>
>
> Setting bit i in the TPDA_FLUSH_CR register initiates a flush request
> for port i, forcing the data to synchronize and be transmitted to the
> sink device.
>
> Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
> Reviewed-by: James Clark <james.clark@linaro.org>
> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> .../ABI/testing/sysfs-bus-coresight-devices-tpda | 7 ++++
> drivers/hwtracing/coresight/coresight-tpda.c | 49 ++++++++++++++++++++++
> drivers/hwtracing/coresight/coresight-tpda.h | 1 +
> 3 files changed, 57 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> index a7855922328e..ef2804f87d1e 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
> @@ -41,3 +41,10 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
> Description:
> (RW) Configure the CMB/MCMB channel mode for all enabled ports.
> Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
> +
> +What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
> +Date: December 2025
> +KernelVersion: 6.19
> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
> +Description:
> + (RW) Configure the bit i to requests a flush operation of port i on the TPDA.
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
> index d378ff8ad77d..5b4a9e41b067 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.c
> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
> @@ -375,6 +375,45 @@ static ssize_t tpda_trig_sysfs_store(struct device *dev,
> return ret;
> }
>
> +static ssize_t port_flush_req_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + unsigned long val;
> +
> + if (!drvdata->csdev->refcnt)
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR);
> +
> + return sysfs_emit(buf, "0x%lx\n", val);
> +}
> +
> +static ssize_t port_flush_req_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf,
> + size_t size)
> +{
> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + u32 val;
> +
> + if (kstrtou32(buf, 0, &val))
> + return -EINVAL;
> +
> + if (!drvdata->csdev->refcnt || !val)
> + return -EINVAL;
> +
> + guard(spinlock)(&drvdata->spinlock);
> + CS_UNLOCK(drvdata->base);
> + writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR);
> + CS_LOCK(drvdata->base);
> +
> + return size;
> +}
> +static DEVICE_ATTR_RW(port_flush_req);
> +
> static struct attribute *tpda_global_cr_attrs[] = {
> tpda_trig_sysfs_rw(global_flush_req, FLREQ),
> tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
> @@ -385,13 +424,23 @@ static struct attribute *tpda_global_cr_attrs[] = {
> NULL,
> };
>
> +static struct attribute *tpda_attrs[] = {
> + &dev_attr_port_flush_req.attr,
> + NULL,
> +};
> +
But why ? Why can't this be a part of the tpda_global_cr_attrs[] ?
For that matter, why is tpda_global_cr_attrs named as such and why not
tpda_attrs ?
Suzuki
> static struct attribute_group tpda_global_cr_attr_grp = {
> .attrs = tpda_global_cr_attrs,
> .name = "global_cr",
> };
>
> +static struct attribute_group tpda_attr_grp = {
> + .attrs = tpda_attrs,
> +};
> +
> static const struct attribute_group *tpda_attr_grps[] = {
> &tpda_global_cr_attr_grp,
> + &tpda_attr_grp,
> NULL,
> };
>
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
> index 97e2729c15c9..ec93f9cb9648 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.h
> +++ b/drivers/hwtracing/coresight/coresight-tpda.h
> @@ -10,6 +10,7 @@
> #define TPDA_Pn_CR(n) (0x004 + (n * 4))
> #define TPDA_FPID_CR (0x084)
> #define TPDA_SYNCR (0x08C)
> +#define TPDA_FLUSH_CR (0x090)
>
> /* Cross trigger Global (all ports) flush request bit */
> #define TPDA_CR_FLREQ BIT(0)
>
next prev parent reply other threads:[~2025-12-19 10:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 10:04 [PATCH v5 0/3] add sysfs nodes to configure TPDA's registers Jie Gan
2025-12-19 10:04 ` [PATCH v5 1/3] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
2025-12-19 10:22 ` Suzuki K Poulose
2025-12-19 12:19 ` Jie Gan
2025-12-19 10:04 ` [PATCH v5 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
2025-12-19 10:24 ` Suzuki K Poulose
2025-12-19 12:31 ` Jie Gan
2025-12-19 13:00 ` Jie Gan
2025-12-19 10:04 ` [PATCH v5 3/3] coresight: tpda: add sysfs node to flush specific port Jie Gan
2025-12-19 10:33 ` Suzuki K Poulose [this message]
2025-12-19 12:32 ` Jie Gan
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