mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Gerd Bayer <gbayer@linux.ibm.com>
To: Leon Romanovsky <leon@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>
Cc: Saeed Mahameed <saeedm@nvidia.com>,
	Tariq Toukan <tariqt@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller"	 <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski	 <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>, Jason Gunthorpe <jgg@ziepe.ca>,
	Jay Cornwall <Jay.Cornwall@amd.com>,
	Felix Kuehling <Felix.Kuehling@amd.com>,
	Niklas Schnelle	 <schnelle@linux.ibm.com>,
	Alexander Schmidt <alexs@linux.ibm.com>,
	netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
	linux-kernel@vger.kernel.org, Gerd Bayer <gbayer@linux.ibm.com>
Subject: Re: [PATCH RFC 2/2] ib/mlx5: Request PCIe AtomicOps enabled for all 3 sizes
Date: Thu, 06 Nov 2025 13:16:18 +0100	[thread overview]
Message-ID: <ec44c1ceab176c0a4c6447f966da8b7061958ffe.camel@linux.ibm.com> (raw)
In-Reply-To: <20251106101917.GB15456@unreal>

On Thu, 2025-11-06 at 12:19 +0200, Leon Romanovsky wrote:
> On Wed, Nov 05, 2025 at 06:55:14PM +0100, Gerd Bayer wrote:
> > Pass fully populated capability bit-mask requesting support for all 3
> > sizes of AtomicOps at once when attempting to enable AtomicOps for PCI
> > function.
> > 
> > When called individually, pci_enable_atomic_ops_to_root() may enable the
> > device to send requests as soon as one size is supported. According to
> > PCIe Spec 7.0 Section 6.15.3.1 support of 32-bit and 64-bit AtomicOps
> > completer capabilities are tied together for root-ports. Only the
> > 128-bit/CAS completer capabilities is an optional feature, but still we
> > might end up end up enabling AtomicOps despite 128-bit/CAS is not
> > supported at the root-port.
> > 
> > Signed-off-by: Gerd Bayer <gbayer@linux.ibm.com>
> > ---
> >  drivers/infiniband/hw/mlx5/data_direct.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/infiniband/hw/mlx5/data_direct.c b/drivers/infiniband/hw/mlx5/data_direct.c
> > index b81ac5709b56f6ac0d9f60572ce7144258fa2794..112185be53f1ccc6a797e129f24432bdc86008ae 100644
> > --- a/drivers/infiniband/hw/mlx5/data_direct.c
> > +++ b/drivers/infiniband/hw/mlx5/data_direct.c
> > @@ -179,9 +179,9 @@ static int mlx5_data_direct_probe(struct pci_dev *pdev, const struct pci_device_
> >  	if (err)
> >  		goto err_disable;
> >  
> > -	if (pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP32) &&
> > -	    pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP64) &&
> > -	    pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP128))
> > +	if (pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
> > +						PCI_EXP_DEVCAP2_ATOMIC_COMP64 |
> > +						PCI_EXP_DEVCAP2_ATOMIC_COMP128))
> 
> I would expect some new define which combines all together, with some
> comment why it exists:
> #define PCI_ATOMIC_COMP_v7  PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64 | PCI_EXP_DEVCAP2_ATOMIC_COMP128

I see your point. I don't understand the _v7, though.
Reading PCI Express spec 7.0 section 6.15.3.1 where for root ports
basically just 3 combinations are specified:

 - No support (all 3 sizes off)
 - Basic support (32-bit and 64-bit supported)
 - Full support (Base + 128-bit CAS supported)

I would propose to add the following combined defines to
include/uapi/linux/pci_regs.h - and then use them here:

#PCI_EXP_RP_ATOMIC_COMP_BASE(_SUPPORT) to be the "or" of _COMP32 and
_COMP64 and 
#PCI_EXP_RP_ATOMIC_COMP_FULL(_SUPPORT) to include also 128-bit

But I guess that becomes a PCI question then. @Bjorn?

> Anyway the change looks right to me.
> 
> Thanks,
> Acked-by: Leon Romanovsky <leon@kernel.org>

  reply	other threads:[~2025-11-06 12:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05 17:55 [PATCH RFC 0/2] mlx5/pci: Fix enablement of PCIe AtomicOp Requests Gerd Bayer
2025-11-05 17:55 ` [PATCH RFC 1/2] net/mlx5: Request PCIe AtomicOps enabled for all 3 sizes Gerd Bayer
2025-11-05 17:55 ` [PATCH RFC 2/2] ib/mlx5: " Gerd Bayer
2025-11-06 10:19   ` Leon Romanovsky
2025-11-06 12:16     ` Gerd Bayer [this message]
2025-11-06 13:14       ` Leon Romanovsky

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ec44c1ceab176c0a4c6447f966da8b7061958ffe.camel@linux.ibm.com \
    --to=gbayer@linux.ibm.com \
    --cc=Felix.Kuehling@amd.com \
    --cc=Jay.Cornwall@amd.com \
    --cc=alexs@linux.ibm.com \
    --cc=andrew+netdev@lunn.ch \
    --cc=bhelgaas@google.com \
    --cc=davem@davemloft.net \
    --cc=edumazet@google.com \
    --cc=jgg@ziepe.ca \
    --cc=kuba@kernel.org \
    --cc=leon@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rdma@vger.kernel.org \
    --cc=mbloch@nvidia.com \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=saeedm@nvidia.com \
    --cc=schnelle@linux.ibm.com \
    --cc=tariqt@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®