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Tue, 24 Jul 2018 16:15:12 +0000 From: Leonard Crestez To: Lucas Stach , Andrey Smirnov , Richard Zhu , Shawn Guo Cc: Anson Huang , Philipp Zabel , Bjorn Helgaas , Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Fabio Estevam , Dong Aisheng , linux-imx@nxp.com, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] Revert "ARM: dts: imx7d: Invert legacy PCI irq mapping" Date: Tue, 24 Jul 2018 19:14:19 +0300 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: AM3PR05CA0137.eurprd05.prod.outlook.com (2603:10a6:207:3::15) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a9eefc66-7544-43b7-8e1e-08d5f180a2de X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989117)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(5600073)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM0PR04MB4290; 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That commit followed the reference manual but unfortunately the imx7d manual is incorrect. Tested with ath9k pcie card and confirmed internally. Signed-off-by: Leonard Crestez --- arch/arm/boot/dts/imx7d.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 7cbc2ffa4b3a..7234e8330a57 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -124,14 +124,18 @@ num-lanes = <1>; interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + /* + * Reference manual lists pci irqs incorrectly + * Real hardware ordering is same as imx6: D+MSI, C, B, A + */ + interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, <&clks IMX7D_PCIE_PHY_ROOT_CLK>; clock-names = "pcie", "pcie_bus", "pcie_phy"; assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, -- 2.17.1