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([2406:7400:56:e503:403c:f88f:3e17:55ae]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-141387c5747sm31311985c88.5.2026.08.16.10.39.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 16 Aug 2026 10:39:36 -0700 (PDT) Message-ID: Date: Sun, 16 Aug 2026 23:09:21 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] dt-bindings: spi: ti,davinci-spi: convert to DT schema To: Bhargav Joshi , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Nishanth Menon , Santosh Shilimkar Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com References: <20260816-ti-davinci-spi-v2-0-6c6f5171422b@gmail.com> <20260816-ti-davinci-spi-v2-2-6c6f5171422b@gmail.com> Content-Language: en-US From: Dhruva G In-Reply-To: <20260816-ti-davinci-spi-v2-2-6c6f5171422b@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Bhargav, On 16-08-2026 03:53, Bhargav Joshi wrote: > Convert the TI DaVinci/Keystone SPI controller binding from text format > to DT schema. > > Changes during the conversion: > - Create a separate ti,davinci-spi-peripheral-props.yaml schema to > properly define the ti,spi-wdelay peripheral property. > - Add missing dmas and dma-names properties. > - Add constraints to ti,spi-wdelay based on the 6-bit width > of the SPIFMTn.WDELAY hardware register field. > > Signed-off-by: Bhargav Joshi > --- > .../devicetree/bindings/spi/spi-davinci.txt | 100 -----------------> .../bindings/spi/spi-peripheral-props.yaml | 1 + > .../spi/ti,davinci-spi-peripheral-props.yaml | 25 +++++ > .../devicetree/bindings/spi/ti,davinci-spi.yaml | 118 +++++++++++++++++++++ > 4 files changed, 144 insertions(+), 100 deletions(-) > [..snip..] > diff --git a/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml b/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml > new file mode 100644 > index 000000000000..b685082de721 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml > @@ -0,0 +1,118 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/ti,davinci-spi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: TI DaVinci/Keystone SPI Controller > + > +maintainers: > + - Bartosz Golaszewski > + > +properties: > + compatible: > + oneOf: > + - enum: > + - ti,da830-spi > + - ti,keystone-spi > + - ti,dm6441-spi > + - items: > + - const: ti,keystone-spi > + - const: ti,dm6441-spi > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + description: > + Should contain a phandle to a PM domain provider node > + and an args specifier containing the SPI device id > + value. > + > + num-cs: > + minimum: 1 > + default: 1 > + description: > + Number of chip selects supported by the controller. This > + includes both internal and GPIO chip selects. > + > + ti,davinci-spi-intr-line: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [0, 1] > + description: > + Interrupt line used to connect the SPI IP to the interrupt > + controller within the SoC. The SPI peripheral can route its > + interrupt output to one of two lines (INT0 or INT1). Set > + this based on the SoC-specific wiring to the interrupt > + controller. > + > + dmas: > + items: > + - description: RX DMA channel > + - description: TX DMA channel > + > + dma-names: > + items: > + - const: rx > + - const: tx > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - ti,davinci-spi-intr-line The old text binding lists #address-cells, #size-cells, and num-cs as required properties, but the converted schema omits all three from the required list, was that intentional? spi-controller.yaml defines these properties but does not require them, so this silently relaxes the binding and permits controller nodes without the SPI bus cell declarations. num-cs was also required by the old binding. It should remain required to preserve the existing binding, or else the commit message should explain why making it optional and relying on the driver's default of one is intentional. > + > +allOf: > + - $ref: spi-controller.yaml# > + - if: > + properties: > + compatible: > + const: ti,keystone-spi > + then: > + required: > + - power-domains > + > +unevaluatedProperties: false > + > +examples: > + - | > + spi@20bf0000 { > + compatible = "ti,keystone-spi","ti,dm6441-spi"; One minor nit: please add a space after the comma: compatible = "ti,keystone-spi", "ti,dm6441-spi"; > + reg = <0x20bf0000 0x1000>; > + num-cs = <4>; > + ti,davinci-spi-intr-line = <0>; > + interrupts = <338>; > + clocks = <&clkspi>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + spi-max-frequency = <25000000>; > + reg = <0>; > + ti,spi-wdelay = <8>; > + }; > + }; > + > + - | > + spi@41000 { > + compatible = "ti,da830-spi"; > + reg = <0x41000 0x1000>; > + num-cs = <6>; > + ti,davinci-spi-intr-line = <1>; > + interrupts = <20>; > + dmas = <&edma0 14 0>, <&edma0 15 0>; > + dma-names = "rx", "tx"; > + clocks = <&psc0 4>; > + power-domains = <&psc0 4>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; >