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Right, will fix this. > >> +static int setup_sg_tables(struct dma_work *work, struct list_head **src_pos, >> + struct list_head **dst_pos, int nr) >> +{ > ... snip .. >> + dev = dmaengine_get_dma_device(work->chan); >> + if (!dev) { >> + ret = -ENODEV; >> + goto err_free_dst_table; >> + } >> + ret = dma_map_sgtable(dev, work->src_sgt, DMA_TO_DEVICE, >> + DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_NO_KERNEL_MAPPING); >> + if (ret) >> + goto err_free_dst_table; >> + ret = dma_map_sgtable(dev, work->dst_sgt, DMA_FROM_DEVICE, >> + DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_NO_KERNEL_MAPPING); >> + if (ret) >> + goto err_unmap_src; >> + >> + if (work->src_sgt->nents != work->dst_sgt->nents) { >> + ret = -EINVAL; >> + goto err_unmap_dst; >> + } > > Fairly new to dma space, but I thought the dma stuff could merge pages > on iommu systems. Wouldn't this check hit fairly often? > I tested on Zen3 system (with PTDMA) across different folio sizes and didn't see this check hit in ~1000s of runs. I'll think more about this problem and discuss with IOMMU team. For now the focus of this series is the batch migration and core offload infrastructure. This is a reference driver to test the offload plumbing potential performance benefit. I'm happy to refine this once the design settles. Best regards, Shivank