From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: Sandeep Singh <Sandeep.Singh@amd.com>,
mathias.nyman@intel.com, gregkh@linuxfoundation.org,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
sanket.goswami@amd.com, Nehal-bakulchandra.Shah@amd.com
Cc: Shyam-sundar.S-k@amd.com
Subject: Re: [PATCH v2] usb: xhci: Workaround for S3 issue on AMD SNPS 3.0 xHC
Date: Mon, 26 Oct 2020 16:46:50 +0200 [thread overview]
Message-ID: <ed3847f0-f219-547a-e887-cd0d48f77dda@linux.intel.com> (raw)
In-Reply-To: <20201023131503.759671-1-Sandeep.Singh@amd.com>
On 23.10.2020 16.15, Sandeep Singh wrote:
> From: Sandeep Singh <sandeep.singh@amd.com>
>
> On some platform of AMD, S3 fails with HCE and SRE errors. To fix this,
> need to disable a bit which is enable in sparse controller.
>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sandeep Singh <sandeep.singh@amd.com>
> ---
> Changes since v1:(https://lkml.org/lkml/2020/10/23/368)
> -> Add xhci.h changes
>
Added to queue.
This looks like it should go to stable as well.
-Mathias
next prev parent reply other threads:[~2020-10-26 14:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 13:15 Sandeep Singh
2020-10-26 14:46 ` Mathias Nyman [this message]
2020-10-28 6:31 ` Singh, Sandeep
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