From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 694AD219A72; Tue, 4 Feb 2025 19:46:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738698374; cv=none; b=XlisrkMeFwjQpG6qDBNYz35v5sH3z4LzMt1P9WPNuIeR2mE8z7iWAju+SBC3w4fUZ8bb6QfBFuaEBLicmfQbJY+K4PEBWPqPjlfmxEgjv+L5EmicS/m84VpifwKMNoVGQ8/P7Y7YKEotsm3XM8JIKUUJdFMHotlcla2XOUa5+U0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738698374; c=relaxed/simple; bh=r06Ys/KsS4X0Vszu9md9b4R25aJZJCzPxRdr0nQj3y4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Zk+/qAYjM25ITy4svkh/THwwL41UYLKlX6amnazRQyhvBfNM/BuBwr7pTXGIBRb41MNR2JJy8f9zFjnclyeKWsKDOBMmIao2sM7I4SUbOWa6ZIp0eoNcvg7ndiJxGPnF6Bjc1saq/p8+Gd1KjYfNEq98ngvJsbjQ3tUg/RmwMTc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=3buDB5fG; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="3buDB5fG" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=ouyIGRoRHutzUz66Y2cHQcMvqZJWhjqRJ8fahRg0FpI=; b=3buDB5fGFmO2PF9Z2zP1t/uh4G hEEbKntHnP7+fUZcZt1zxz1yOjr7WwWBjGaq/sKNZ3hq+keI5t9mh5LkNKu7fN8lO0ebNgldJmmr1 7b21bZoJOjYuheY/s2UaY74VMsQjY9rWxUeVbKatxBifYOayRrSN4s/PMbD6q1YeEbng=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1tfOrm-00AxD1-Vs; Tue, 04 Feb 2025 20:45:50 +0100 Date: Tue, 4 Feb 2025 20:45:50 +0100 From: Andrew Lunn To: Chen-Yu Tsai Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiko Stuebner , "Russell King (Oracle)" , Steven Price , Chen-Yu Tsai , Kunihiko Hayashi , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH netdev] net: stmmac: dwmac-rk: Provide FIFO sizes for DWMAC 1000 Message-ID: References: <20250204161359.3335241-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250204161359.3335241-1-wens@kernel.org> On Wed, Feb 05, 2025 at 12:13:59AM +0800, Chen-Yu Tsai wrote: > From: Chen-Yu Tsai > > The DWMAC 1000 DMA capabilities register does not provide actual > FIFO sizes, nor does the driver really care. If they are not > provided via some other means, the driver will work fine, only > disallowing changing the MTU setting. > > The recent commit 8865d22656b4 ("net: stmmac: Specify hardware > capability value when FIFO size isn't specified") changed this by > requiring the FIFO sizes to be provided, breaking devices that were > working just fine. > > Provide the FIFO sizes through the driver's platform data, to not > only fix the breakage, but also enable MTU changes. The FIFO sizes > are confirmed to be the same across RK3288, RK3328, RK3399 and PX30, > based on their respective manuals. It is likely that Rockchip > synthesized their DWMAC 1000 with the same parameters on all their > chips that have it. > > Fixes: eaf4fac47807 ("net: stmmac: Do not accept invalid MTU values") > Fixes: 8865d22656b4 ("net: stmmac: Specify hardware capability value when FIFO size isn't specified") > Cc: > Signed-off-by: Chen-Yu Tsai > --- > The reason for stable inclusion is not to fix the device breakage > (which only broke in v6.14-rc1), but to provide the values so that MTU > changes can work in older kernels. Allowing the MTU to be changed is probably classed as a new feature, not bug fix. I _think_ this also allows flow control, which again is a new feature. Please submit to net-next. Andrew