From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758187AbdEVJj3 (ORCPT ); Mon, 22 May 2017 05:39:29 -0400 Received: from foss.arm.com ([217.140.101.70]:34064 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757522AbdEVJj1 (ORCPT ); Mon, 22 May 2017 05:39:27 -0400 Subject: Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC To: Icenowy Zheng , Thomas Gleixner , Jason Cooper , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Lee Jones , Liam Girdwood , Mark Brown References: <20170518071653.36561-1-icenowy@aosc.io> <20170518071653.36561-3-icenowy@aosc.io> Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com From: Marc Zyngier Organization: ARM Ltd Message-ID: Date: Mon, 22 May 2017 10:39:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170518071653.36561-3-icenowy@aosc.io> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/05/17 08:16, Icenowy Zheng wrote: > Add support for the newly imported compatible for the A64 R_INTC in > irq-sunxi-nmi driver. > > Signed-off-by: Icenowy Zheng > --- > Changes in v5: > - Fix A64 R_INTC compatible. > > drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c > index 668730c5cb66..5559c1d593bf 100644 > --- a/drivers/irqchip/irq-sunxi-nmi.c > +++ b/drivers/irqchip/irq-sunxi-nmi.c > @@ -56,6 +56,12 @@ static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = { > .enable = 0x04, > }; > > +static struct sunxi_sc_nmi_reg_offs sun50i_reg_offs = { > + .ctrl = 0x0c, > + .pend = 0x10, > + .enable = 0x40, > +}; > + Magic values? Even if no #define is provided, a pointer to the corresponding documentation would be appreciated (assuming documentation exists). > static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off, > u32 val) > { > @@ -220,3 +226,10 @@ static int __init sun9i_nmi_irq_init(struct device_node *node, > return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs); > } > IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init); > + > +static int __init sun50i_nmi_irq_init(struct device_node *node, > + struct device_node *parent) > +{ > + return sunxi_sc_nmi_irq_init(node, &sun50i_reg_offs); > +} > +IRQCHIP_DECLARE(sun50i_nmi, "allwinner,sun50i-a64-r-intc", sun50i_nmi_irq_init); > Apart from the above: Acked-by: Marc Zyngier Let me know how you want this to be merged. Thanks, M. -- Jazz is not dead. It just smells funny...