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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA4MDA3NCBTYWx0ZWRfX1Gam03fuVGnE KNwIknPdwh2NrCh+V/Sl7X0q/rhTLpRM6ZYSHuhUQSnwoK/PF/lOJC1Z+biC8G9vXG6eheXI6IC jyFiIb02Sbhb5MYTp0wmDY+qxWpvRy/JnbzxBqwi3Uzq6ENP00FYSpqlCJozTdsSQvIW+q9/1ex LvOOmrR+/KSqYETgymc5excYldOWxCVnTSVYMMnlWMVphid/Ia75yMPaXxd5uW1Pio8MEiw/SBS 0o9pWt9TXlhYW8yh3srJ4OYsDO2AAmmQT9tKD1qh/NPvk1By02c9/m2IC0r3Oir37+Zd7xrI8JH /A6KUjQu+UVVGMCJHMpzvbS3qRUavPtjst+Njqgr96O1BXUaX+j8gasPbLADkTi2IlZDrY+iy7r l9Yw+hF06UUIaVktXjGI+8x6Od7rd+Sz1RL8QmlP0KrhA1gInPtDtCExMTQlxLBIDPYoZ91Qpiz spKYdNDafjPu2mL+V2g== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA4MDA3NCBTYWx0ZWRfX9WkA2N6K8Qd8 04oIqKJ5LseWTqvsK4egRyhrUKUY5cMqPD7JZ+1CZENC4mY/+kpAKNT1HQzDObMYF0xfGfgznTa GjMqZxaBtKCBX5HnTq1T7lMvUyMAfm8= X-Proofpoint-ORIG-GUID: LJFf_8zUrw3GPZBL6OKLx8eC47lkVszR X-Authority-Analysis: v=2.4 cv=U6aiy+ru c=1 sm=1 tr=0 ts=6a9fb81d cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=MdwB8lPkXo1r4_ePphwA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-GUID: LJFf_8zUrw3GPZBL6OKLx8eC47lkVszR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_01,2026-09-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 impostorscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 priorityscore=1501 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609080074 On 9/7/26 4:33 PM, Manivannan Sadhasivam wrote: > From: Manivannan Sadhasivam > > qcom_pcie_config_sid_1_9_0() reads the "iommu-map" property as an array > of fixed four-word {rid-base, phandle, sid, rid-len} entries to program > the BDF to SID translation table. But that layout only holds for an > IOMMU with '#iommu-cells = <1>'. The PCIe SMMUs on these SoCs use > '#iommu-cells = <2>' (SID and mask), so per the pci-iommu binding each > entry is really five cells long. [...] > + /* > + * Retain backward compatibility with DTs that describe iommu-map > + * with 4-cell entries against an IOMMU declaring #iommu-cells = 2, > + * matching the fallback in drivers/of/base.c::of_check_bad_map(). Can we export it from there instead? Perhaps as a follow-up change given this is a fix to a current breakage.. I was hoping this whole logic could be simplified a bit by reusing the map parsing logic from of/property.c, but alas it doesn't seem feasible given we essentially need more data Konrad