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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ndHQQRMCeiUPksqdRK2AtOuqCX9M2Taz21cZfQN8blpFWbCSTQtuFfpyTZFCFu/VpDJngsod4vRRqe4caqHrnm93Cmtt7wpIFdg6ornD8443wP2rzy0K2H0VTQ9wQ4tz4/1evCGMZpd8qYlgCNtrec5cveE8ocrNTzVLowkd7CDIHkFF6OLBMo/2piCtQEBC+G0XTJfME/f3rF6K3pKv4O1ptjdylzptvC56JrU4u3I8Oed9mJVVvOVwx7FLEXZA9ikE/9YZA+ufCQmYwtDIsAUsum66T+yn6xx/2umnOIclLQZ9gCaw0WydoRETw9PSDwkld2J6TcXfuZRjOTVST5xXmC97Rp0mCfm1f0z7jzmrbp1wZq1KF0uJUs+HiBDRKKlmrZi/yAMnICRZsitGCxSgDKnkPKbAo3Hn1nt3k7OKco0gAF7okjvkwx0tDrsE X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2026 14:36:09.4542 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f8b3c56-4c39-445a-0951-08df41937683 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509EC.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6343 On 12/11/2026 08:32, Krzysztof Kozlowski wrote: > On 11/11/2026 11:43, Karunika Choo wrote: >> On 11/11/2026 08:29, Krzysztof Kozlowski wrote: >>> On Tue, Nov 10, 2026 at 03:38:32PM +0000, Karunika Choo wrote: >>>> Mali 5th-Gen AM GPUs expose an AM_SYSTEM block for GPU-wide control and >>>> the AM_ASSIGN block for HW resource assignment outside the GPU >>>> job submission register window. >>>> >>>> Document the system node compatible, register and interrupt resources, >>>> GPU clock, and assignment properties for HW resource assignment. >>>> >>>> Signed-off-by: Karunika Choo >>>> --- >>>> v2: >>>> - Add an optional AM_ASSIGN register range. Require this range when the >>>> assignments node is present. >>>> - Describe resource-group assignments for AXI buses, partitions, slices >>>> and access windows on partition-capable GPUs. >>>> - Allow gpu-arbitration child nodes and the #address-cells, #size-cells >>>> and ranges properties. >>>> - Remove the panthor-system node-name restriction. >>>> - Remove gpu-supply from the schema and example. >>>> - Add an example with assignments for partition-capable GPU with four >>>> resource groups. >>>> - Move the MAINTAINERS update to the GPU schema patch. >>>> >>>> .../bindings/gpu/arm,mali-gen5-am-system.yaml | 196 ++++++++++++++++++ >>>> 1 file changed, 196 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml >>>> >>>> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml >>>> new file mode 100644 >>>> index 0000000000000..9e0477b8b723a >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml >>>> @@ -0,0 +1,196 @@ >>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >>>> +# Copyright 2026 ARM Limited. All rights reserved. >>>> +%YAML 1.2 >>>> +--- >>>> +$id: http://devicetree.org/schemas/gpu/arm,mali-gen5-am-system.yaml# >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>> + >>>> +title: ARM Mali 5th-Gen GPU System Device >>>> + >>>> +maintainers: >>>> + - Liviu Dudau >>>> + - Boris Brezillon >>>> + >>>> +properties: >>>> + compatible: >>>> + items: >>>> + - const: arm,mali-gen5-am-system >>>> + >>>> + reg: >>>> + minItems: 1 >>>> + maxItems: 2 >>> >>> Why is this flexible? There is no description in the binding which would >>> explain oddities in choices of hardware representation. >> >> I will restore the description that was previously asked to be dropped. > > Hm, let me open the cover letter to find lore link to previous > discussion and check... ah wait, no cover letter! > >> >>>> + >>>> + reg-names: >>>> + minItems: 1 >>>> + items: >>>> + - const: system >>>> + - const: assign >>>> + >>>> + interrupts: >>>> + maxItems: 1 >>>> + >>>> + clocks: >>>> + maxItems: 1 >>>> + >>>> + dma-coherent: true >>>> + >>>> + "#address-cells": true >>>> + >>>> + "#size-cells": true >>> >>> Both need to be const or enum. >>> >>>> + >>>> + ranges: true >>>> + >>>> + assignments: >>> >>> Do not mix nodes with and without bus addressing. That's mess. >> >> Hi, I was asked to use a more generic DT such that should the > > By whom? > >> hardware registers change in the future we can still retain >> some compatibility. Is it necessarily a problem? > > Bindings are not generic, but specific. Apologies, this was discussed internally with a Panthor maintainer previously. Would the following example DT be more acceptable? --8<------------------------------------------- panthor_system: gpu-system@68000000 { compatible = "example-vendor,example-soc-mali-system", "arm,mali-gen5-am-system"; reg = <0x68000000 0x10000>, <0x68010000 0x10000>; reg-names = "system", "assign"; interrupts = ; clocks = <&mali_gpu_clk>; dma-coherent; arm,am-resource-group-bus = <0x1100>; arm,am-partition-resource-group = <0x3210>; arm,am-slice-resource-group = <0x33221100>; arm,am-aw-resource-group = <0x33332222 0x11110000 0x0 0x0>; panthor_arbitration: gpu-arbitration@68040000 { ... }; }; -->8------------------------------------------- > ... > >>>> +patternProperties: >>>> + '^gpu-arbitration@[a-f0-9]+$': >>>> + $ref: arm,mali-gen5-am-arbitration.yaml# >>> >>> There is no such file. You did not really test it. >> >> Sorry, this was included from a later patch that >> introduces this file. I will move it there in v3. >> >>> >>>> + >>>> +required: >>>> + - compatible >>>> + - reg >>>> + - reg-names >>>> + - interrupts >>>> + - clocks >>>> + >>>> +additionalProperties: false >>> >>> This goes after allOf: block. >>> >>>> + >>>> +allOf: >>>> + - if: >>>> + required: >>>> + - assignments >>>> + then: >>>> + properties: >>>> + reg: >>>> + minItems: 2 >>>> + reg-names: >>>> + minItems: 2 >>>> + >>>> +examples: >>>> + - | >>>> + #include >>>> + #include >>>> + >>>> + gpu-system@68000000 { >>>> + compatible = "arm,mali-gen5-am-system"; >>>> + reg = <0x68000000 0x10000>; >>>> + reg-names = "system"; >>>> + interrupts = ; >>>> + clocks = <&mali_gpu_clk>; >>>> + }; >>>> + - | >>>> + #include >>>> + #include >>>> + >>>> + gpu-system@68000000 { >>>> + compatible = "arm,mali-gen5-am-system"; >>>> + reg = <0x68000000 0x10000>, <0x68010000 0x10000>; >>>> + reg-names = "system", "assign"; >>>> + interrupts = ; >>>> + clocks = <&mali_gpu_clk>; >>>> + >>>> + assignments { >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + resource-group@0 { >>>> + reg = <0>; >>>> + arm,axi-bus = <0>; >>>> + arm,partition-mask = <0x1>; >>>> + arm,slice-mask = <0x3>; >>>> + arm,access-window-mask = <0xf>; >>>> + }; >>>> + >>>> + resource-group@1 { >>>> + reg = <1>; >>>> + arm,axi-bus = <0>; >>>> + arm,partition-mask = <0x2>; >>>> + arm,slice-mask = <0xc>; >>>> + arm,access-window-mask = <0xf0>; >>>> + }; >>>> + >>>> + resource-group@2 { >>>> + reg = <2>; >>>> + arm,axi-bus = <1>; >>>> + arm,partition-mask = <0x4>; >>>> + arm,slice-mask = <0x30>; >>>> + arm,access-window-mask = <0xf00>; >>>> + }; >>>> + >>>> + resource-group@3 { >>>> + reg = <3>; >>>> + arm,axi-bus = <1>; >>>> + arm,partition-mask = <0x8>; >>>> + arm,slice-mask = <0xc0>; >>>> + arm,access-window-mask = <0xf000>; >>>> + }; >>> >>> Your example is incomplete. >> >> Could you clarify what specifically is missing? > > ll the properties you added in the binding. > > Best regards, > Krzysztof Thanks. I'll add that in v3. Kind regards, Karunika