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Thu, 21 Aug 2025 08:35:40 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:da43:aeff:fecc:bfd5]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-325123e7879sm98778a91.1.2025.08.21.08.35.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Aug 2025 08:35:40 -0700 (PDT) Sender: Guenter Roeck Date: Thu, 21 Aug 2025 08:35:39 -0700 From: Guenter Roeck To: Sangwook Shin Cc: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, semen.protsenko@linaro.org, dongil01.park@samsung.com, khwan.seo@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 4/5] watchdog: s3c2410_wdt: exynosautov920: Enable QUIRK_HAS_32BIT_CNT Message-ID: References: <20250818021826.623830-1-sw617.shin@samsung.com> <20250818021826.623830-5-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250818021826.623830-5-sw617.shin@samsung.com> On Mon, Aug 18, 2025 at 11:18:25AM +0900, Sangwook Shin wrote: > Enable QUIRK_HAS_32BIT_CNT to ExynosAutov920 SoC which has 32-bit WTCNT. > > Reviewed-by: Sam Protsenko > Signed-off-by: Sangwook Shin Reviewed-by: Guenter Roeck > --- > drivers/watchdog/s3c2410_wdt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c > index d983cbcb975c..915d3c88565a 100644 > --- a/drivers/watchdog/s3c2410_wdt.c > +++ b/drivers/watchdog/s3c2410_wdt.c > @@ -357,7 +357,7 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl0 = { > .cnt_en_bit = 8, > .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | > QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | > - QUIRK_HAS_DBGACK_BIT, > + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, > }; > > static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl1 = { > @@ -370,7 +370,7 @@ static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl1 = { > .cnt_en_bit = 8, > .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | > QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | > - QUIRK_HAS_DBGACK_BIT, > + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_CNT, > }; > > static const struct of_device_id s3c2410_wdt_match[] = { > -- > 2.25.1 >