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Wed, 15 Jul 2026 05:24:19 -0700 (PDT) X-Received: by 2002:a05:6214:459f:b0:8e7:d237:4aa9 with SMTP id 6a1803df08f44-90403d516e3mr172365626d6.7.1784118259369; Wed, 15 Jul 2026 05:24:19 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-69cd287882asm2931930a12.3.2026.07.15.05.24.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Jul 2026 05:24:17 -0700 (PDT) Message-ID: Date: Wed, 15 Jul 2026 14:24:12 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode To: Mukesh Kumar Savaliya , viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com, quic_jseerapu@quicinc.com, zhengxingda@iscas.ac.cn, kees@kernel.org, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: krzysztof.kozlowski@oss.qualcomm.com, bartosz.golaszewski@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com References: <20260708051023.2872304-1-mukesh.savaliya@oss.qualcomm.com> <20260708051023.2872304-5-mukesh.savaliya@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260708051023.2872304-5-mukesh.savaliya@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE1MDEyMyBTYWx0ZWRfX4bm1F5MN2WDU 7epRhlTVwSLD79glJCAZnsQOj1u+WodOub17a6XUt0crOpJLvdgjyetocTZW+zhxaP7cV1iI3Gu FSx7rDunTGw/qRBYFBgATa8uJjylIIq6EEWF8lwtj1kwkYG7hnblF2sPSivHvMIiGxn4hY9Y6d6 LSd95YtQFKBT8zT62YGdg9u6Lr2EOxTUt50xMIzknXace2JOFwVKks2jdMeRdWFJCC6N7thQJAH eINqxge4yAEg2CS6zrYPY/PDj5uJ1oBkK/qjBVr186wumEVqc5SJVFjuPW+o06zd8TfDwQrvM+7 CAd6If81r6OV+mHzILh3mtq+xn1soH83tOWehJmWcsj3Wn6ekTuVPTTv7tuktYYr+mv+t/UC9fQ rZsVM2ihwhRRCZz61YpYjDDCH7BfI0jMxrtagrcCxoP5Q/mLJ42QnyEzhrXon2A7SLl0SnYjM6L b69KF2n/zZa9rXZ5wmQ== X-Proofpoint-ORIG-GUID: O9wtnHqwwHd6Kw7h5sY3C7NgZmu3U1q7 X-Proofpoint-GUID: O9wtnHqwwHd6Kw7h5sY3C7NgZmu3U1q7 X-Authority-Analysis: v=2.4 cv=E+79Y6dl c=1 sm=1 tr=0 ts=6a577bf4 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=Y68E4KffrGY8xuMxYjUA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE1MDEyMyBTYWx0ZWRfX/3HDYo5Ax4VL 7iAUDi7y9GtsK+7DroB93V6iR9g0I+xU7xQNwUz2/PNiKqvoGvFOiGhQpQKl7mHr+ToyYyXoZoB gdNbDjDU+ZC+HFO7ohc1vrJOE8Z4p7U= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-15_02,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 impostorscore=0 adultscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607150123 On 7/8/26 7:10 AM, Mukesh Kumar Savaliya wrote: > Some platforms use a QUP-based I2C controller in a configuration where the > controller is shared with another system processor. In this setup the > operating system must not assume exclusive ownership of the controller or > its associated pins. > > Add support for enabling multi-owner operation when DeviceTree specifies > qcom,qup-multi-owner. When enabled, mark the underlying serial engine as > shared so the common GENI resource handling avoids selecting the "sleep" > pinctrl state, which could disrupt transfers initiated by the other > processor. > > For GPI mode transfers, request lock/unlock TRE sequencing from the GPI > driver by setting a single lock_action selector per message, emitting lock > before the first message and unlock after the last message (handling the > single-message case as well). This serializes access to the shared > controller without requiring message-position flags to be passed into the > DMA engine layer. > > Signed-off-by: Mukesh Kumar Savaliya > --- [...] > + if (gi2c->se.multi_owner) > + return dev_err_probe(gi2c->se.dev, -EINVAL, > + "I2C sharing not supported in non GSI mode\n"); ultra nit: "non-GSI" > + > tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); > > /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ > @@ -1098,6 +1115,11 @@ static int geni_i2c_probe(struct platform_device *pdev) > gi2c->clk_freq_out = I2C_MAX_STANDARD_MODE_FREQ; > } > > + if (of_property_read_bool(pdev->dev.of_node, "qcom,qup-multi-owner")) { Let's use device_property_present() instead. with that: Reviewed-by: Konrad Dybcio Konrad