From: Dave Hansen <dave.hansen@intel.com>
To: "Chang S. Bae" <chang.seok.bae@intel.com>,
linux-kernel@vger.kernel.org, x86@kernel.org,
linux-pm@vger.kernel.org
Cc: tglx@linutronix.de, dave.hansen@linux.intel.com,
peterz@infradead.org, bp@alien8.de, rafael@kernel.org,
ravi.v.shankar@intel.com
Subject: Re: [PATCH v3 1/3] x86/fpu: Make XCR0 accessors immune to unwanted compiler reordering
Date: Fri, 1 Apr 2022 10:58:05 -0700 [thread overview]
Message-ID: <ee82ed75-03f5-1962-6888-11491c9569c8@intel.com> (raw)
In-Reply-To: <20220325022219.829-2-chang.seok.bae@intel.com>
On 3/24/22 19:22, Chang S. Bae wrote:
> Some old GCC versions (4.9.x and 5.x) have an issue that incorrectly
> reordering volatile asm statements with each other [1]. While this bug was
> fixed on later versions (8.1, 7.3, and 6.5), and the kernel's current XCR0
> read/write do not appear to be impacted, it is preventive to ensure them on
> the program order.
I thought you *actually* saw xgetbv() be reordered, though. Was that on
a buggy compiler?
next prev parent reply other threads:[~2022-04-01 17:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-25 2:22 [PATCH v3 0/3] x86/fpu: Make AMX state ready for CPU idle Chang S. Bae
2022-03-25 2:22 ` [PATCH v3 1/3] x86/fpu: Make XCR0 accessors immune to unwanted compiler reordering Chang S. Bae
2022-04-01 17:58 ` Dave Hansen [this message]
2022-04-01 18:16 ` Dave Hansen
2022-04-01 22:14 ` Chang S. Bae
2022-03-25 2:22 ` [PATCH v3 2/3] x86/fpu: Add a helper to prepare AMX state for low-power CPU idle Chang S. Bae
2022-04-03 16:37 ` Thomas Gleixner
2022-04-05 0:24 ` Chang S. Bae
2022-03-25 2:22 ` [PATCH v3 3/3] intel_idle: Add a new flag to initialize the AMX state Chang S. Bae
2022-03-29 17:42 ` Rafael J. Wysocki
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