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Fri, 29 Jun 2018 11:18:11 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 29 Jun 2018 11:18:06 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 29 Jun 2018 11:18:06 -0500 Received: from [172.22.154.139] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5TGI5h1024102; Fri, 29 Jun 2018 11:18:06 -0500 Subject: Re: [PATCH net-next v2 1/2] net: phy: DP83TC811: Add INT_STAT3 To: Andrew Lunn CC: , , References: <20180629153546.24107-1-dmurphy@ti.com> <20180629154502.GG11285@lunn.ch> From: Dan Murphy Message-ID: Date: Fri, 29 Jun 2018 11:17:54 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20180629154502.GG11285@lunn.ch> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Andrew On 06/29/2018 10:45 AM, Andrew Lunn wrote: > On Fri, Jun 29, 2018 at 10:35:45AM -0500, Dan Murphy wrote: >> Add INT_STAT3 interrupt setting and clearing >> support. >> >> Signed-off-by: Dan Murphy >> --- >> >> v2 - Removed bug fix removal of writing INT_STAT1 twice when disabling interrupts >> >> drivers/net/phy/dp83tc811.c | 26 ++++++++++++++++++++++++++ >> 1 file changed, 26 insertions(+) >> >> diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c >> index 49ac678eb2dc..f8653f5d8789 100644 >> --- a/drivers/net/phy/dp83tc811.c >> +++ b/drivers/net/phy/dp83tc811.c >> @@ -21,6 +21,7 @@ >> #define MII_DP83811_SGMII_CTRL 0x09 >> #define MII_DP83811_INT_STAT1 0x12 >> #define MII_DP83811_INT_STAT2 0x13 >> +#define MII_DP83811_INT_STAT3 0x18 >> #define MII_DP83811_RESET_CTRL 0x1f >> >> #define DP83811_HW_RESET BIT(15) >> @@ -44,6 +45,11 @@ >> #define DP83811_OVERVOLTAGE_INT_EN BIT(6) >> #define DP83811_UNDERVOLTAGE_INT_EN BIT(7) >> >> +/* INT_STAT3 bits */ >> +#define DP83811_LPS_INT_EN BIT(0) >> +#define DP83811_NO_FRAME_INT_EN BIT(3) >> +#define DP83811_POR_DONE_INT_EN BIT(4) >> + >> #define MII_DP83811_RXSOP1 0x04a5 >> #define MII_DP83811_RXSOP2 0x04a6 >> #define MII_DP83811_RXSOP3 0x04a7 >> @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev) >> if (err < 0) >> return err; >> >> + err = phy_read(phydev, MII_DP83811_INT_STAT3); >> + if (err < 0) >> + return err; >> + >> return 0; >> } >> >> @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev) >> DP83811_UNDERVOLTAGE_INT_EN); >> >> err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status); > > Hi Dan > > Isn't this going to fail to apply because net-next says STAT1 here? > Yes but this should not be a pre-requisite for a code review. Maybe I should have put the RFC in the subject. > That is why i said you need to wait for David to merge net into > net-next. Then you can submit these patches, and not have conflicts. > > Andrew > -- ------------------ Dan Murphy