Re: [PATCH RFT v2 1/2] arm64: dts: qcom: glymur: Describe display related nodes

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 1/13/26 4:00 PM, Abel Vesa wrote:
> From: Abel Vesa <abel.vesa@linaro.org>
> 
> The MDSS (Mobile Display SubSystem) on Glymur comes with 4 DisplayPort
> controllers. Describe them along with display controller and the eDP
> PHY. Then, attach the combo PHYs link and vco_div clocks to the Display
> clock controller and link up the PHYs and DP endpoints in the graph.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/glymur.dtsi | 431 ++++++++++++++++++++++++++++++++++-
>  1 file changed, 423 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 53b8ab7580bd..0b7b2756508c 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -2377,6 +2377,7 @@ port@2 {
>  					reg = <2>;
>  
>  					usb_dp_qmpphy_dp_in: endpoint {
> +						remote-endpoint = <&mdss_dp0_out>;
>  					};
>  				};
>  			};
> @@ -2447,6 +2448,7 @@ port@2 {
>  					reg = <2>;
>  
>  					usb1_ss1_qmpphy_dp_in: endpoint {
> +						remote-endpoint = <&mdss_dp1_out>;
>  					};
>  				};
>  			};
> @@ -2466,6 +2468,27 @@ usb_2_hsphy: phy@fa0000 {
>  			status = "disabled";
>  		};
>  
> +		mdss_dp3_phy: phy@faac00 {

This definitely says eDP2 in the docs..

> +			compatible = "qcom,glymur-dp-phy";
> +			reg = <0 0x00faac00 0 0x1d0>,
> +			      <0 0x00faa400 0 0x128>,
> +			      <0 0x00faa800 0 0x128>,
> +			      <0 0x00faa000 0 0x358>;
> +
> +			clocks = <&dispcc DISP_CC_MDSS_DPTX3_AUX_CLK>,

The branch clock sits on MMCX and the RCG on MX.. fun..

> +				 <&dispcc DISP_CC_MDSS_AHB_CLK>,

Here it's MMCX/MMCX

> +				 <&tcsr TCSR_EDP_CLKREF_EN>;

And this should be always-on

[...]

> +			mdss_mdp: display-controller@ae01000 {
> +				compatible = "qcom,glymur-dpu";
> +				reg = <0 0x0ae01000 0 0x93000>,
> +				      <0 0x0aeb0000 0 0x2008>;

len=0x3000

There's also a VBIF_NRT region @ 0xaeb8000, len=0x3000

[...]

> +				mdp_opp_table: opp-table {
> +					compatible = "operating-points-v2";

156 @ LOWSVS_D1

> +
> +					opp-205000000 {
> +						opp-hz = /bits/ 64 <205000000>;
> +						required-opps = <&rpmhpd_opp_low_svs>;
> +					};
> +
> +					opp-337000000 {
> +						opp-hz = /bits/ 64 <337000000>;
> +						required-opps = <&rpmhpd_opp_svs>;
> +					};
> +
> +					opp-417000000 {
> +						opp-hz = /bits/ 64 <417000000>;
> +						required-opps = <&rpmhpd_opp_svs_l1>;
> +					};
> +
> +					opp-532000000 {
> +						opp-hz = /bits/ 64 <532000000>;
> +						required-opps = <&rpmhpd_opp_nom>;
> +					};
> +
> +					opp-600000000 {
> +						opp-hz = /bits/ 64 <600000000>;
> +						required-opps = <&rpmhpd_opp_nom_l1>;
> +					};

660 @ TURBO
717 @ TURBO_L1

> +				};
> +			};
> +
> +			mdss_dp0: displayport-controller@af54000 {
> +				compatible = "qcom,glymur-dp";
> +				reg = <0x0 0xaf54000 0x0 0x104>,

0x200

> +				      <0x0 0xaf54200 0x0 0xc0>,

0x200

> +				      <0x0 0xaf55000 0x0 0x770>,

0xc00

> +				      <0x0 0xaf56000 0x0 0x9c>,

0x400
> +				      <0x0 0xaf57000 0x0 0x9c>;

0x400

+ You need 4 more regions

[...]

> +				mdss_dp0_opp_table: opp-table {
> +					compatible = "operating-points-v2";
> +
> +					opp-192000000 {
> +						opp-hz = /bits/ 64 <192000000>;
> +						required-opps = <&rpmhpd_opp_low_svs_d1>;
> +					};
> +
> +					opp-270000000 {
> +						opp-hz = /bits/ 64 <270000000>;
> +						required-opps = <&rpmhpd_opp_low_svs>;
> +					};
> +
> +					opp-540000000 {
> +						opp-hz = /bits/ 64 <540000000>;
> +						required-opps = <&rpmhpd_opp_svs_l1>;

svs

675 @ svs_l1

Same comments for other DP hosts (although double-check the last one, it
was different on hamoa)

Konrad