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[62.143.245.32]) by smtp.gmail.com with ESMTPSA id u17-20020a05600c19d100b00416b163e52bsm6658726wmq.14.2024.04.18.07.20.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Apr 2024 07:20:28 -0700 (PDT) Message-ID: Date: Thu, 18 Apr 2024 16:20:26 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v4 00/20] RISC-V: ACPI: Add external interrupt controller support To: Sunil V L Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev, Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= References: <20240415170113.662318-1-sunilvl@ventanamicro.com> <87a5lqsrvh.fsf@all.your.base.are.belong.to.us> Content-Language: en-US From: Heinrich Schuchardt In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 18.04.24 15:58, Sunil V L wrote: > Hi Björn, > > This is cool!. I was not aware that u-boot also supports ACPI on > RISC-V. Many thanks! > > Thanks, > Sunil For RISC-V and ARM we have * pass-through for QEMU ACPI tables * pass-through for QEMU SMBIOS tables * generation of SMBIOS tables Generation of ACPI tables in U-Boot has up now only been implemented for x86 but would be feasible for RISC-V boards too. Cf. https://docs.u-boot.org/en/latest/board/emulation/acpi.html Best regards Heinrich