From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422873AbcFHIc7 (ORCPT ); Wed, 8 Jun 2016 04:32:59 -0400 Received: from smtp6-v.fe.bosch.de ([139.15.237.11]:17594 "EHLO smtp6-v.fe.bosch.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161190AbcFHIcz convert rfc822-to-8bit (ORCPT ); Wed, 8 Jun 2016 04:32:55 -0400 From: "Koehrer Mathias (ETAS/ESW5)" To: "gregkh@linuxfoundation.org" CC: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "hjk@hansjkoch.de" , "helgaas@kernel.org" Subject: Re: [PATCH] Introducing kernel option to force all PCI memory resources to be page aligned. Fixes issues with uio based drivers. Thread-Topic: [PATCH] Introducing kernel option to force all PCI memory resources to be page aligned. Fixes issues with uio based drivers. Thread-Index: AdHBYE1uYQXHMvaUQvS7AURAn3pgyQ== Date: Wed, 8 Jun 2016 08:32:52 +0000 Message-ID: Accept-Language: de-DE, en-US Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.5.145.185] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22376.006 X-TMASE-MatchedRID: cgbqQT5W8hcn2WEbWzq9rYzb2GR6Ttd3suIso71Vk6K48McbajxWsBjb R/XCsHXWUggSTV/j56Hp59W9qUX4aIWu/OirI2WTj5hLPCX3ZdML8TGleseLPCJ8zskw0dbrCeu P5Fj9Qub3dZ1Cg8TR3dXvnLbvjzbpXZXnjooQdcit0sUUpHt26Vp3ZyBFb3SCXPj+S2+wTZmEkN peaxt2NOLzNWBegCW2OubYLCVnBVF5zdAzex5xZgQc6VeRDy3uQsEjxnq2RIPOiD1TTogUvy0oi bpNWK1MkkWSH4s+Cp2UTGVAhB5EbQ== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Greg, > > > > The issue is not the firmware. The issue is that the Linux uio > > > > driver > > > > (here: uio_cif) does not work as uio_mmap() -> uio_mmap_physical() > > > > does not do a mmap on physical memory that is not page aligned... > > > > > > Then why not fix the uio_cif driver? > > The fix might be in uio and not in uio_cif. However > > uio_mmap_physical() in uio.c has introduced checks to reject non page- > aligned addresses. > > Yes, because we had real problems with that in the past. > > > These checks have been introduced somewhere in between kernel V3.2 and > kernel V3.18. > > Removing these checks again does not sound to me like a good idea... > > I agree, you should fix your hardware :) > > > The overall question is now if the UIO system is working at all with > > non page aligned PCI memory resources. For me it looks as if this is not the > case. > > How is your system ending up with such alignment in the first place? > What is the resource list after booting? Here is the resource list of the relevant PCI board. The first memory resource has a size of 128k and is not page aligned. 0f:05.0 Bridge: PLX Technology, Inc. PCI9030 32-bit 33MHz PCI <-> IOBus Bridge (rev 01) Subsystem: PLX Technology, Inc. Hilscher CIF50-PB/DPS Profibus Flags: medium devsel, IRQ 23 Memory at eae4f400 (32-bit, non-prefetchable) [size=128] I/O ports at 9800 [size=128] Memory at eae4c000 (32-bit, non-prefetchable) [size=8K] Capabilities: [40] Power Management version 1 Capabilities: [48] CompactPCI hot-swap Capabilities: [4c] Vital Product Data Kernel driver in use: hilscher Regards Mathias