From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 430C8209F48 for ; Fri, 10 Jan 2025 13:01:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736514080; cv=none; b=mmTeXSK/Mx253/XRz1TIkE6GxFHc6UlpW2+YktYP74slPbCnA/DkacriD0hzfx2DDpOlchUaar4xa/c/bRpR4e1JxIh9YDo/e4Z5nUah3PksbQnloJQRgpwaarQ1aAkjRskd46fEgn9Lk/A4G38qlPLrIeysUy38a/ALH2Dynpg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736514080; c=relaxed/simple; bh=qdoIAaqvePP55ZiWUqMlc/bIwt20RefQLOWD8PjKg2E=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=kZzklabOU6xFOeyF7GPtdlOAEvyqwYwxD6PFQH2uv4QS64tDouwJT8uhCxDadDzAD2VIijpJid4i/kLXUEizGI5gmy35uKuP01ubprRjaC/GatxsB7FtwKgu23ukpI8PryYaFdQU6zlSXhYJ0SkowBuG03cL2fl66ZTi6dRHnFc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=PrWj7vKw; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="PrWj7vKw" Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50ABKFQQ018513; Fri, 10 Jan 2025 14:00:50 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= FQHuheijM5S9Ev2HmelYR2pqAQgPuPjmjnQQD9As+4g=; b=PrWj7vKwAgn4GprH hAFpW29a/nqNL1YcXdNh3xRvaX516JfYUlTqtpWAZwdeLA2Fw+o/0FKArGuwKCQL ZaRssb0GJC3lVTUEtFrAiXCheBmbgJ+JVfr/WsouR4MegR1JQWrzkfI4KskEunDu 2AqeLPGWvJ/6+461Y8Uq0VGvpU6YYNmAPitLTNPkZWXiYqvvd9djy2tZVYm/DKdg tsP6dVn8MA077hhIMW0FHmT99HeofutidR1llDf6DjDLJhnEzJ46PSWB2rym96FV rWOpIr0r6TKGeYxt116/WZQdTKEgHiC+FKDK25ljqsmNni81+BuILH36+lZjT8sr ugsywQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 442f5q53pv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Jan 2025 14:00:50 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id C9D3140046; Fri, 10 Jan 2025 13:59:39 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 10BD42B0C96; Fri, 10 Jan 2025 13:57:40 +0100 (CET) Received: from [10.129.178.212] (10.129.178.212) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 10 Jan 2025 13:57:39 +0100 Message-ID: Date: Fri, 10 Jan 2025 13:57:31 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] phy: stm32: work around constant-value overflow assertion To: Arnd Bergmann , Vinod Koul , Kishon Vijay Abraham I , Maxime Coquelin , Alexandre Torgue CC: Arnd Bergmann , Yang Li , , , , References: <20241111103712.3520611-1-arnd@kernel.org> Content-Language: en-US From: Christian Bruel In-Reply-To: <20241111103712.3520611-1-arnd@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 Hello, Sorry, I missed this patch. The gcc warning bellow is a false positive as the range is necessarily between the min_imp/max_imp values, thus imp_lookup will catch, or returned -EINVAL earlier So maybe a more explicit way to shut-up the warning would be to use a boolean flag with a WARN_ON, something like: bool found; for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) { if (imp_lookup[imp_of].microohm <= val) { found = true; break; } } dev_dbg(combophy->dev, "Set %u micro-ohms output impedance\n", imp_lookup[imp_of].microohm); if (WARN_ON(! found)) return; regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, STM32MP25_PCIEPRG_IMPCTRL_OHM, FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of)); Regards Christian On 11/11/24 11:37, Arnd Bergmann wrote: > From: Arnd Bergmann > > FIELD_PREP() checks that a constant fits into the available bitfield, > but if one of the two lookup tables in stm32_impedance_tune() does > not find a matching entry, the index is out of range, which gcc > correctly complains about: > > In file included from : > In function 'stm32_impedance_tune', > inlined from 'stm32_combophy_pll_init' at drivers/phy/st/phy-stm32-combophy.c:247:9: > include/linux/compiler_types.h:517:38: error: call to '__compiletime_assert_447' declared with attribute error: FIELD_PREP: value too large for the field > 517 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) > | ^ > include/linux/bitfield.h:68:3: note: in expansion of macro 'BUILD_BUG_ON_MSG' > 68 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ > 115 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ > | ^~~~~~~~~~~~~~~~ > drivers/phy/st/phy-stm32-combophy.c:162:8: note: in expansion of macro 'FIELD_PREP' > 162 | FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of)); > | ^~~~~~~~~~ > > Rework this so the field value gets set inside of the loop and otherwise > set to zero. > > Fixes: 47e1bb6b4ba0 ("phy: stm32: Add support for STM32MP25 COMBOPHY.") > Signed-off-by: Arnd Bergmann > --- > drivers/phy/st/phy-stm32-combophy.c | 21 +++++++++++++++------ > 1 file changed, 15 insertions(+), 6 deletions(-) > > diff --git a/drivers/phy/st/phy-stm32-combophy.c b/drivers/phy/st/phy-stm32-combophy.c > index 765bb34fe358..49e9fa90a681 100644 > --- a/drivers/phy/st/phy-stm32-combophy.c > +++ b/drivers/phy/st/phy-stm32-combophy.c > @@ -122,6 +122,7 @@ static int stm32_impedance_tune(struct stm32_combophy *combophy) > u32 max_vswing = imp_lookup[imp_size - 1].vswing[vswing_size - 1]; > u32 min_vswing = imp_lookup[0].vswing[0]; > u32 val; > + u32 regval; > > if (!of_property_read_u32(combophy->dev->of_node, "st,output-micro-ohms", &val)) { > if (val < min_imp || val > max_imp) { > @@ -129,16 +130,20 @@ static int stm32_impedance_tune(struct stm32_combophy *combophy) > return -EINVAL; > } > > - for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) > - if (imp_lookup[imp_of].microohm <= val) > + regval = 0; > + for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) { > + if (imp_lookup[imp_of].microohm <= val) { > + regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of); > break; > + } > + } > > dev_dbg(combophy->dev, "Set %u micro-ohms output impedance\n", > imp_lookup[imp_of].microohm); > > regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, > STM32MP25_PCIEPRG_IMPCTRL_OHM, > - FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of)); > + regval); > } else { > regmap_read(combophy->regmap, SYSCFG_PCIEPRGCR, &val); > imp_of = FIELD_GET(STM32MP25_PCIEPRG_IMPCTRL_OHM, val); > @@ -150,16 +155,20 @@ static int stm32_impedance_tune(struct stm32_combophy *combophy) > return -EINVAL; > } > > - for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) > - if (imp_lookup[imp_of].vswing[vswing_of] >= val) > + regval = 0; > + for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) { > + if (imp_lookup[imp_of].vswing[vswing_of] >= val) { > + regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of); > break; > + } > + } > > dev_dbg(combophy->dev, "Set %u microvolt swing\n", > imp_lookup[imp_of].vswing[vswing_of]); > > regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, > STM32MP25_PCIEPRG_IMPCTRL_VSWING, > - FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of)); > + regval); > } > > return 0;