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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Jie Gan <jie.gan@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: glymur: add coresight nodes
Date: Mon, 23 Mar 2026 12:05:32 +0100	[thread overview]
Message-ID: <ef89e328-fda6-43f4-b40c-8834d16e2cfd@oss.qualcomm.com> (raw)
In-Reply-To: <20260318-add-coresight-dt-nodes-for-glymur-v2-1-d76e08f21fa5@oss.qualcomm.com>

On 3/18/26 12:42 PM, Jie Gan wrote:
> Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF.
> These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and
> some small subsystems, such as GCC, IPCC, PMU and so on.
> 
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> Changes in V2:
> 1. removed two cti devices due to GFX block is down

i.e. "because GPU is not yet enabled"?

>    - cti@11c42000
>    - cti@11c4b000
> 2. changes two TPDM devices to static:
>    - tpdm-cdsp-cmsr
>    - tpdm-cdsp-cmsr2

They were TPDM instances in v1. What's the reason for the change?

Konrad

  reply	other threads:[~2026-03-23 11:05 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 11:42 Jie Gan
2026-03-23 11:05 ` Konrad Dybcio [this message]
2026-03-23 12:30   ` Jie Gan
2026-03-23 13:02     ` Konrad Dybcio
2026-03-23 13:27       ` Jie Gan
2026-03-23 14:03         ` Bjorn Andersson
2026-03-23 14:09           ` Jie Gan
2026-03-23 14:12             ` Konrad Dybcio
2026-03-23 14:18               ` Jie Gan
2026-03-25  0:59               ` Jie Gan

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