From: <Conor.Dooley@microchip.com>
To: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<palmer@rivosinc.com>, <aou@eecs.berkeley.edu>,
<sudeep.holla@arm.com>, <catalin.marinas@arm.com>,
<will@kernel.org>, <gregkh@linuxfoundation.org>,
<rafael@kernel.org>, <linux@armlinux.org.uk>, <arnd@arndb.de>
Cc: <Daire.McNamara@microchip.com>, <niklas.cassel@wdc.com>,
<damien.lemoal@opensource.wdc.com>, <geert@linux-m68k.org>,
<zong.li@sifive.com>, <kernel@esmil.dk>, <hahnjo@hahnjo.de>,
<guoren@kernel.org>, <anup@brainfault.org>,
<atishp@atishpatra.org>, <heiko@sntech.de>,
<philipp.tomsich@vrull.eu>, <robh@kernel.org>, <maz@kernel.org>,
<viresh.kumar@linaro.org>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <Brice.Goglin@inria.fr>
Subject: Re: [PATCH v2 1/2] arm64: topology: move store_cpu_topology() to shared code
Date: Sat, 9 Jul 2022 12:58:57 +0000 [thread overview]
Message-ID: <efa89122-b428-7691-49d3-f5867206f05a@microchip.com> (raw)
In-Reply-To: <fb8534d9-baaa-2643-5119-602dfa5de758@microchip.com>
+CC Russel, Arnd
On 08/07/2022 21:45, Conor Dooley - M52691 wrote:
> On 08/07/2022 21:33, Conor Dooley wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> arm64's method of defining a default cpu topology requires only minimal
>> changes to apply to RISC-V also. The current arm64 implementation exits
>> early in a uniprocessor configuration by reading MPIDR & claiming that
>> uniprocessor can rely on the default values.
>>
>> This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
>> topology: Stop using MPIDR for topology information")', because the
>> current code just assigns default values for multiprocessor systems.
>>
>> With the MPIDR references removed, store_cpu_topolgy() can be moved to
>> the common arch_topology code.
>>
>> CC: stable@vger.kernel.org
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>> ---
---8<---
>> #ifdef CONFIG_ACPI
>> static bool __init acpi_cpu_is_threaded(int cpu)
>> {
>> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
>> index 441e14ac33a4..07e84c6ac5c2 100644
>> --- a/drivers/base/arch_topology.c
>> +++ b/drivers/base/arch_topology.c
>> @@ -765,6 +765,25 @@ void update_siblings_masks(unsigned int cpuid)
>> }
>> }
>>
>> +void __weak store_cpu_topology(unsigned int cpuid)
>
> Ahh crap, I forgot to remove the __weak.
> I won't immediately respin since it is minor. I've pushed it (without
> the __weak) to https://git.kernel.org/conor/h/arch-topo so it'll get
> the lkp coverage.
And build failure for arm32:
> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git arch-topo
> branch HEAD: df379c4b12f6b22fb8c07c2be16fd821a4fcbfc5 riscv: topology: fix default topology reporting
>
> Error/Warning: (recently discovered and may have been fixed)
>
> arch_topology.c:(.text+0xbac): multiple definition of `store_cpu_topology'; arch/arm/kernel/topology.o:topology.c:(.text+0x0): first defined here
>
> Error/Warning ids grouped by kconfigs:
>
> gcc_recent_errors
> `-- arm-defconfig
> `-- multiple-definition-of-store_cpu_topology-arch-arm-kernel-topology.o:topology.c:(.text):first-defined-here
>
> elapsed time: 721m
Looking at the arm32 implementation - it appears to be mostly the sort of MPIDR
stuff that was removed from the arm64 implementation in 3102bc0e6ac7 ("arm64:
topology: Stop using MPIDR for topology information"). Could arm32 benefit from
the same shared implemenation too, or is usage of MPIDR only invalid for arm64?
The other difference is a call to update_cpu_capacity() in the arm32
implementation. Could that be moved to smp_store_cpu_info() which is the only
callsite of store_cpu_topology()?
Either way, will respin a v3 that doesn't break the arm32 build when
CONFIG_GENERIC_ARCH_TOPOLOGY is enabled :)
Thanks,
Conor.
next prev parent reply other threads:[~2022-07-09 12:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 20:33 [PATCH v2 0/2] Fix RISC-V's arch-topology reporting Conor Dooley
2022-07-08 20:33 ` [PATCH v2 1/2] arm64: topology: move store_cpu_topology() to shared code Conor Dooley
2022-07-08 20:45 ` Conor.Dooley
2022-07-09 12:58 ` Conor.Dooley [this message]
2022-07-09 19:50 ` Russell King (Oracle)
2022-07-11 10:02 ` Sudeep Holla
2022-07-11 10:24 ` Conor.Dooley
2022-07-08 20:33 ` [PATCH v2 2/2] riscv: topology: fix default topology reporting Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=efa89122-b428-7691-49d3-f5867206f05a@microchip.com \
--to=conor.dooley@microchip.com \
--cc=Brice.Goglin@inria.fr \
--cc=Daire.McNamara@microchip.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=arnd@arndb.de \
--cc=atishp@atishpatra.org \
--cc=catalin.marinas@arm.com \
--cc=damien.lemoal@opensource.wdc.com \
--cc=geert@linux-m68k.org \
--cc=gregkh@linuxfoundation.org \
--cc=guoren@kernel.org \
--cc=hahnjo@hahnjo.de \
--cc=heiko@sntech.de \
--cc=kernel@esmil.dk \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux@armlinux.org.uk \
--cc=maz@kernel.org \
--cc=niklas.cassel@wdc.com \
--cc=palmer@dabbelt.com \
--cc=palmer@rivosinc.com \
--cc=paul.walmsley@sifive.com \
--cc=philipp.tomsich@vrull.eu \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
--cc=sudeep.holla@arm.com \
--cc=viresh.kumar@linaro.org \
--cc=will@kernel.org \
--cc=zong.li@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®