From: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Bryan O'Donoghue <bod@kernel.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 4/6] media: iris: remove duplicateion between generic gen2 data and qcs8300
Date: Thu, 23 Oct 2025 14:22:43 +0530 [thread overview]
Message-ID: <efd311b8-136d-0e08-4e1e-6cc02651d22c@oss.qualcomm.com> (raw)
In-Reply-To: <20251019-iris-sc7280-v4-4-ee6dcee6e741@oss.qualcomm.com>
Pls fix the typo in commit title s/duplicateion/duplication
with that.
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
On 10/19/2025 1:26 PM, Dmitry Baryshkov wrote:
> Now as we have removed PIPE value from inst_fw_caps_dec there should be
> no difference between inst_fw_caps of QCS8300 and SM8550+. Drop the
> QCS8300-specific tables and use generic one instead.
>
> The differences between QCS8300 and SM8550 data comes from a
> non-conflict merge of commit d22037f3fd33 ("media: iris: Set platform
> capabilities to firmware for encoder video device") (which added .set
> callbacks), and commit 6bdfa3f947a7 ("media: iris: Add platform-specific
> capabilities for encoder video device") (which added QCS8300 data, but
> not the callbacks).
>
> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> .../media/platform/qcom/iris/iris_platform_gen2.c | 9 +-
> .../platform/qcom/iris/iris_platform_qcs8300.h | 533 +--------------------
> 2 files changed, 8 insertions(+), 534 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> index 03ce5c259c8491ae6882128795d18569baea6241..6970bee488e4617478f807a30afd231275875f5a 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> @@ -995,7 +995,6 @@ const struct iris_platform_data sm8750_data = {
> /*
> * Shares most of SM8550 data except:
> * - inst_caps to platform_inst_cap_qcs8300
> - * - inst_fw_caps to inst_fw_cap_qcs8300
> */
> const struct iris_platform_data qcs8300_data = {
> .get_instance = iris_hfi_gen2_get_instance,
> @@ -1021,10 +1020,10 @@ const struct iris_platform_data qcs8300_data = {
> .fwname = "qcom/vpu/vpu30_p4_s6.mbn",
> .pas_id = IRIS_PAS_ID,
> .inst_caps = &platform_inst_cap_qcs8300,
> - .inst_fw_caps_dec = inst_fw_cap_qcs8300_dec,
> - .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_qcs8300_dec),
> - .inst_fw_caps_enc = inst_fw_cap_qcs8300_enc,
> - .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_qcs8300_enc),
> + .inst_fw_caps_dec = inst_fw_cap_sm8550_dec,
> + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8550_dec),
> + .inst_fw_caps_enc = inst_fw_cap_sm8550_enc,
> + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8550_enc),
> .tz_cp_config_data = &tz_cp_config_sm8550,
> .core_arch = VIDEO_ARCH_LX,
> .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
> index 310c48958018ae724d01c87e7977096cd86e1bfd..a97a9f932b75a88535df66160dfc934220919ed5 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
> +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h
> @@ -3,536 +3,9 @@
> * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
> */
>
> -#define BITRATE_MAX 245000000
>
> -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = {
> - {
> - .cap_id = PROFILE_H264,
> - .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
> - .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH),
> - .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
> - .hfi_id = HFI_PROP_PROFILE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = PROFILE_HEVC,
> - .min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> - .max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE),
> - .value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> - .hfi_id = HFI_PROP_PROFILE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = PROFILE_VP9,
> - .min = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
> - .max = V4L2_MPEG_VIDEO_VP9_PROFILE_2,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2),
> - .value = V4L2_MPEG_VIDEO_VP9_PROFILE_0,
> - .hfi_id = HFI_PROP_PROFILE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = LEVEL_H264,
> - .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
> - .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2),
> - .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1,
> - .hfi_id = HFI_PROP_LEVEL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = LEVEL_HEVC,
> - .min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> - .max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
> - .value = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
> - .hfi_id = HFI_PROP_LEVEL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = LEVEL_VP9,
> - .min = V4L2_MPEG_VIDEO_VP9_LEVEL_1_0,
> - .max = V4L2_MPEG_VIDEO_VP9_LEVEL_6_0,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) |
> - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0),
> - .value = V4L2_MPEG_VIDEO_VP9_LEVEL_6_0,
> - .hfi_id = HFI_PROP_LEVEL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = TIER,
> - .min = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> - .max = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH),
> - .value = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> - .hfi_id = HFI_PROP_TIER,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - .set = iris_set_u32_enum,
> - },
> - {
> - .cap_id = INPUT_BUF_HOST_MAX_COUNT,
> - .min = DEFAULT_MAX_HOST_BUF_COUNT,
> - .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT,
> - .step_or_mask = 1,
> - .value = DEFAULT_MAX_HOST_BUF_COUNT,
> - .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT,
> - .flags = CAP_FLAG_INPUT_PORT,
> - .set = iris_set_u32,
> - },
> - {
> - .cap_id = STAGE,
> - .min = STAGE_1,
> - .max = STAGE_2,
> - .step_or_mask = 1,
> - .value = STAGE_2,
> - .hfi_id = HFI_PROP_STAGE,
> - .set = iris_set_stage,
> - },
> - {
> - .cap_id = PIPE,
> - .min = PIPE_1,
> - /* .max, .min and .value are set via platform data */
> - .step_or_mask = 1,
> - .hfi_id = HFI_PROP_PIPE,
> - .set = iris_set_pipe,
> - },
> - {
> - .cap_id = POC,
> - .min = 0,
> - .max = 2,
> - .step_or_mask = 1,
> - .value = 1,
> - .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE,
> - },
> - {
> - .cap_id = CODED_FRAMES,
> - .min = CODED_FRAMES_PROGRESSIVE,
> - .max = CODED_FRAMES_PROGRESSIVE,
> - .step_or_mask = 0,
> - .value = CODED_FRAMES_PROGRESSIVE,
> - .hfi_id = HFI_PROP_CODED_FRAMES,
> - },
> - {
> - .cap_id = BIT_DEPTH,
> - .min = BIT_DEPTH_8,
> - .max = BIT_DEPTH_8,
> - .step_or_mask = 1,
> - .value = BIT_DEPTH_8,
> - .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH,
> - },
> - {
> - .cap_id = RAP_FRAME,
> - .min = 0,
> - .max = 1,
> - .step_or_mask = 1,
> - .value = 1,
> - .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME,
> - .flags = CAP_FLAG_INPUT_PORT,
> - .set = iris_set_u32,
> - },
> -};
> -
> -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] = {
> - {
> - .cap_id = PROFILE_H264,
> - .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
> - .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
> - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH),
> - .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
> - .hfi_id = HFI_PROP_PROFILE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = PROFILE_HEVC,
> - .min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> - .max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10),
> - .value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> - .hfi_id = HFI_PROP_PROFILE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = LEVEL_H264,
> - .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
> - .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_0,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) |
> - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0),
> - .value = V4L2_MPEG_VIDEO_H264_LEVEL_5_0,
> - .hfi_id = HFI_PROP_LEVEL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = LEVEL_HEVC,
> - .min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> - .max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
> - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
> - .value = V4L2_MPEG_VIDEO_HEVC_LEVEL_5,
> - .hfi_id = HFI_PROP_LEVEL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = STAGE,
> - .min = STAGE_1,
> - .max = STAGE_2,
> - .step_or_mask = 1,
> - .value = STAGE_2,
> - .hfi_id = HFI_PROP_STAGE,
> - },
> - {
> - .cap_id = HEADER_MODE,
> - .min = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
> - .max = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) |
> - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME),
> - .value = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
> - .hfi_id = HFI_PROP_SEQ_HEADER_MODE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = PREPEND_SPSPPS_TO_IDR,
> - .min = 0,
> - .max = 1,
> - .step_or_mask = 1,
> - .value = 0,
> - },
> - {
> - .cap_id = BITRATE,
> - .min = 1,
> - .max = BITRATE_MAX,
> - .step_or_mask = 1,
> - .value = BITRATE_DEFAULT,
> - .hfi_id = HFI_PROP_TOTAL_BITRATE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = BITRATE_PEAK,
> - .min = 1,
> - .max = BITRATE_MAX,
> - .step_or_mask = 1,
> - .value = BITRATE_DEFAULT,
> - .hfi_id = HFI_PROP_TOTAL_PEAK_BITRATE,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = BITRATE_MODE,
> - .min = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
> - .max = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
> - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR),
> - .value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
> - .hfi_id = HFI_PROP_RATE_CONTROL,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = FRAME_SKIP_MODE,
> - .min = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
> - .max = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) |
> - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) |
> - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT),
> - .value = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = FRAME_RC_ENABLE,
> - .min = 0,
> - .max = 1,
> - .step_or_mask = 1,
> - .value = 1,
> - },
> - {
> - .cap_id = GOP_SIZE,
> - .min = 0,
> - .max = INT_MAX,
> - .step_or_mask = 1,
> - .value = 2 * DEFAULT_FPS - 1,
> - .hfi_id = HFI_PROP_MAX_GOP_FRAMES,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = ENTROPY_MODE,
> - .min = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
> - .max = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
> - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
> - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC),
> - .value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
> - .hfi_id = HFI_PROP_CABAC_SESSION,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
> - },
> - {
> - .cap_id = MIN_FRAME_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - .hfi_id = HFI_PROP_MIN_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT,
> - },
> - {
> - .cap_id = MIN_FRAME_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - .hfi_id = HFI_PROP_MIN_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT,
> - },
> - {
> - .cap_id = MAX_FRAME_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - .hfi_id = HFI_PROP_MAX_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT,
> - },
> - {
> - .cap_id = MAX_FRAME_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - .hfi_id = HFI_PROP_MAX_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT,
> - },
> - {
> - .cap_id = I_FRAME_MIN_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = I_FRAME_MIN_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = P_FRAME_MIN_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = P_FRAME_MIN_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = B_FRAME_MIN_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = B_FRAME_MIN_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MIN_QP_8BIT,
> - },
> - {
> - .cap_id = I_FRAME_MAX_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = I_FRAME_MAX_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = P_FRAME_MAX_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = P_FRAME_MAX_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = B_FRAME_MAX_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = B_FRAME_MAX_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = MAX_QP,
> - },
> - {
> - .cap_id = I_FRAME_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = I_FRAME_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = P_FRAME_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = P_FRAME_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = B_FRAME_QP_H264,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> - {
> - .cap_id = B_FRAME_QP_HEVC,
> - .min = MIN_QP_8BIT,
> - .max = MAX_QP,
> - .step_or_mask = 1,
> - .value = DEFAULT_QP,
> - .hfi_id = HFI_PROP_QP_PACKED,
> - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
> - CAP_FLAG_DYNAMIC_ALLOWED,
> - },
> -};
> +#ifndef __IRIS_PLATFORM_QCS8300_H__
> +#define __IRIS_PLATFORM_QCS8300_H__
>
> static struct platform_inst_caps platform_inst_cap_qcs8300 = {
> .min_frame_width = 96,
> @@ -547,3 +20,5 @@ static struct platform_inst_caps platform_inst_cap_qcs8300 = {
> .max_frame_rate = MAXIMUM_FPS,
> .max_operating_rate = MAXIMUM_FPS,
> };
> +
> +#endif
>
next prev parent reply other threads:[~2025-10-23 8:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-19 7:56 [PATCH v4 0/6] media: iris: port support for Qualcomm SC7280 Dmitry Baryshkov
2025-10-19 7:56 ` [PATCH v4 1/6] media: iris: turn platform caps into constants Dmitry Baryshkov
2025-10-19 7:56 ` [PATCH v4 2/6] media: iris: turn platform data " Dmitry Baryshkov
2025-10-19 7:56 ` [PATCH v4 3/6] media: iris: stop encoding PIPE value into fw_caps Dmitry Baryshkov
2025-10-23 8:50 ` Dikshita Agarwal
2025-10-23 13:27 ` Dmitry Baryshkov
2025-10-19 7:56 ` [PATCH v4 4/6] media: iris: remove duplicateion between generic gen2 data and qcs8300 Dmitry Baryshkov
2025-10-23 8:52 ` Dikshita Agarwal [this message]
2025-10-19 7:56 ` [PATCH v4 5/6] media: iris: rename sm8250 platform file to gen1 Dmitry Baryshkov
2025-10-19 7:56 ` [PATCH v4 6/6] media: iris: enable support for SC7280 platform Dmitry Baryshkov
2025-10-23 13:31 ` Dikshita Agarwal
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