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Tue, 21 Jul 2026 01:22:04 -0700 (PDT) X-Received: by 2002:a17:903:37c5:b0:2ca:5d9a:ecc6 with SMTP id d9443c01a7336-2cf3494af91mr190418205ad.28.1784622123656; Tue, 21 Jul 2026 01:22:03 -0700 (PDT) Received: from [10.218.39.50] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3476ba24sm70079565ad.75.2026.07.21.01.22.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Jul 2026 01:22:03 -0700 (PDT) Message-ID: Date: Tue, 21 Jul 2026 13:51:30 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iommu/io-pgtable-arm: Add support for contiguous hint bit To: Robin Murphy , Jason Gunthorpe Cc: Will Deacon , "Joerg Roedel (AMD)" , linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Prakash Gupta References: <20260618-iommu_contig_hint-v1-1-4502a59e6388@oss.qualcomm.com> <20260703161228.GA1948451@nvidia.com> <20260715113913.GA3775915@nvidia.com> <2ce09e84-c57f-4087-9dda-07245fadfc02@arm.com> <20260715125039.GA50536@nvidia.com> <20260715180949.GD3775915@nvidia.com> <787fa0d3-c1d4-442e-beaa-91a03238f511@arm.com> Content-Language: en-US From: Vijayanand Jitta In-Reply-To: <787fa0d3-c1d4-442e-beaa-91a03238f511@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: SJL05LyJHsuZSUP4yUMlqxl8Tnk1TzIp X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIxMDA4NyBTYWx0ZWRfXz3SFKAfHKUi8 xM8N6dGplQbJxPHbhhnyAl9mGlYYMYyYvN/Fv6oJlhrAQFPXiZgbc7s0hKK/unCZMk5e2oFnaBc a8erNnxmC+h/1XD68AVebOTsTXiPi7s= X-Proofpoint-GUID: SJL05LyJHsuZSUP4yUMlqxl8Tnk1TzIp X-Authority-Analysis: v=2.4 cv=Sb7HsPRu c=1 sm=1 tr=0 ts=6a5f2c2d cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=sSvbjkl6__CUZ7MaMMgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIxMDA4NyBTYWx0ZWRfX4HInPJzHQE3M tQ5lpDeKIJygtAVZxfbuq0VGZU1MR2Vs7bUoKpeYp4L4yuj+XKeRFmRyyP+bSH3ovhZzyJfC7yq Yw0EKqNHTh48FRiMPQFAMlJ2G0Nj6ttjpRNzMxvggwBM5l/QWz+k+HrqdN4mbzx9Yh1B1CnWouV XR0nOyNwxENRd28c63yStVnebHiWCSnijeaF/dXAVzN1AzUXB+I3ScTGVMZCznHVSBYOs9mZY/+ kVoMjOuJrt8QzaRjUIsX+hcFoYR4wcCrEK9SAmwWHMCX9USEc5vzFsA1emuXrKSUAkB27FdnojX LMrYApX4XsmmbDr2Wc0QF7AwzYscGqidNHaeJTn6VLzUbS86SsBATVwOX6PFX3QBx3e3+Tdzchl PO/m09t0SEamJ+HzW7mo2c18ZQYxXl3BMsUQF16OIpCvz3K2hszhEuQEZL6rxW6ET0gmKdUm/mz WklqPCYxVA1AxRQEOyQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-20_06,2026-07-20_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 spamscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607210087 On 7/16/2026 5:29 PM, Robin Murphy wrote: > On 15/07/2026 7:09 pm, Jason Gunthorpe wrote: >> On Wed, Jul 15, 2026 at 06:45:09PM +0100, Robin Murphy wrote: >> >>>> AFAICR the biggest issue with arm-smmu was it using IO_PGTABLE_ARMV7S >>>> as well. I think it would be fine to implement all the unique LPAE >>>> features it needs in iommupt, I did most of them already. >>>> >>>> I do have an ARMV7S implementation for iommupt, but I did not solve >>>> the sub page problem. So while it is functionally working it is not >>>> usable since it wastes so much memory. That's a tricky problem to >>>> solve since the algorithms depend on the gather->freelist. >>>> >>>> I didn't spend any time trying to do anything about this as I was not >>>> intending to touch arm-smmu >>> >>> Indeed between the irregular table sizes (before you even get to the >>> Mediatek shenanigans...), and the awkward GFP_DMA limitations and/or reality >>> that many of the systems using it really don't have memory to waste, I'd >>> have considered v7s pretty much terminally incompatible with iommu_pages and >>> the abstraction that iommupt is trying to be... :/ >> >> At least Matthew has talked about having a sub page allocator with >> meta data, maybe with the memdesc support someday. Even today we could >> have iommu-pages allocate a companion struct pointed to from struct >> page that was sized 4x so it could be used for the freelist. >> >> There are some other options for alterantive algorithms that could >> work without requiring the free list. I had some thoughts about placing >> the free list inside the data itself as a non-present entry. >> >> It is not insolvable, I'm just not sure it is worth doing vs leaving >> arm-smmu to keep using iopgtable from ARMv7. > > Yeah, if you did want to keep bashing at it, then ultimately there are at least a couple more short-descriptor inspired implementations in exynos and omap too, however at this point I don't see the cost:benefit ratio looking at all favourable... > >> Otherwise to have arm-smmu use iommupt you'd end up with two >> iommu_domains specialized to 32 and 64 bit page tables, with their own >> ops and a shared invalidation like how the tlbi struct is providing >> for smmuv3. >> >> It is not outrageously bad, but it certainly is a chunk of work. >> >> If the goal is arm-smmu support of CONT then maybe there is some merit >> in doing iopgtable as a one off feature. But there have been many >> attempts so far to add CONT and they all had troubles, I had the >> impression is is not so easy.. > > I think now that partial unmaps are firmly ruled out and we already have the multi-page map/unmap design it should be pretty minor. I'm also more than happy to stop there, have dirty tracking, splitting/merging and all the fancy new IOMMUFD stuff require iommupt, and keep io-pgtable strictly for the GPUs and "media" IOMMUs that only need to keep providing map/unmap/iova_to_phys for iommu-dma or equivalent usage. By now I'd also say we can reasonably park arm-smmu in the latter category - while technically it could try to support stuff like nesting and vIOMMU (at least on MMU-500), the hardware is in embedded platforms which either don't care at all, or at worst where virtualisation is Xen's problem not ours. As far as I'm aware even the NXP Layerscape platforms are happy with the status quo of just basic VFIO type 1 for DPDK. > > Thanks, > Robin. FYI, I've just posted v2 addressing the review comments from the earlier round — it doesn't touch the io-pgtable/iommupt split discussed above, just the CONT-hint quirk in the existing io-pgtable-arm code. Thanks, Vijay