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From: "Gowans, James" <jgowans@amazon.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
	"maz@kernel.org" <maz@kernel.org>,
	"liaochang1@huawei.com" <liaochang1@huawei.com>
Cc: "zouyipeng@huawei.com" <zouyipeng@huawei.com>,
	"Raslan, KarimAllah" <karahmed@amazon.com>,
	"Woodhouse, David" <dwmw@amazon.co.uk>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"chris.zjh@huawei.com" <chris.zjh@huawei.com>
Subject: Re: [PATCH] irq: fasteoi handler re-runs on concurrent invoke
Date: Tue, 23 May 2023 11:59:43 +0000	[thread overview]
Message-ID: <efe052679277adf38f0b843420fec7657ed3dc37.camel@amazon.com> (raw)
In-Reply-To: <a2f82321-8bca-d773-b83e-a71c1f455e40@huawei.com>

On Tue, 2023-05-23 at 11:15 +0800, liaochang (A) wrote:
> > 1. Do we need to mask the IRQ and then unmask it later? I don't think so
> > but it's not entirely clear why handle_edge_irq does this anyway; it's
> > an edge IRQ so not sure why it needs to be masked.
> 
> 
> In the GIC architecture, a CPU that is handling an IRQ cannot be signaled
> with a new interrupt until it satisfies the interrupt preemption requirements
> defined in the GIC architecture. One of these requirements is that the
> priority of the new pending interrupt is higher than the priority of the
> current running interrupt. Obviously, the same interrupt source cannot
> preempt itself. Additionally, interrupt priority is rarely enabled in
> the Linux kernel,except for the PESUDO_NMI.
> 
> If the interrupt is an LPI, and interrupt handling is still in progress on
> the original CPU, the lack of the ACITVE state means that the LPI can be
> distributed to another CPU once its affinity has been changed. On the other
> hand, since the desc->istate is marked IRQS_PENDING and this interrupt has
> been consumed on the new CPU, there is no need to mask it and then unmask it later.

Thanks, this makes sense to me and matches my understanding. What I was
actually unsure about was why handle_edge_irq() *does* do the masking. I
guess it's because handle_edge_irq() runs desc->irq_data.chip->irq_ack(),
and perhaps if that isn't run (in the concurrent invoke case) then the IRQ
will keep getting re-triggered? Wild speculation. :-)

> > 2. Should the EOI delivery be inside the do loop after every handler
> > run? I think outside the loops is best; only inform the chip to deliver
> > more IRQs once all pending runs have been finished.
> 
> The GIC architecture requires that writes to the EOI register be in the exact
> reverse order of reads from the IAR register. Therefore, IAR and EOI must be paired.
> Writing EOI inside the do loop after every handler may cause subtle problems.
> 
Ah ha! (where is this documented, btw?) And because the IAR read happens
really early in (for example) __gic_handle_irq_from_irqson() it only makes
sense to call EOI once when returning from the interrupt context. That
also means that in the concurrent invoke case we would need to run EOI
even if the handler was not invoked.

> > 3. Do we need to check that desc->action is still set? I don't know if
> > it can be un-set while the IRQ is still enabled.
> 
> This check is necessary here. When the code enters this critical section, the kernel
> running on another CPU might have already unregistered the IRQ action via the free_irq API.
> Although free_irq is typically used in code paths called on module unload or exception
> handling, we have also observed that virtualization using VFIO as a PCI backend
> frequently intends to use free_irq in some regular code paths.
> 

Okay, I'm a bit hazy on whether it is or should be possible to unregister
the IRQ action while the handler is still running - it sounds like you're
saying this is possible and safe. More code spelunking would be necessary
to verify this but I won't bother seeing as it looks like the solution
we're tending towards uses check_irq_resend(), instead of invoking the
handler directly.

JG

  reply	other threads:[~2023-05-23 11:59 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-17  9:53 James Gowans
2023-03-17 10:12 ` Yipeng Zou
2023-03-17 11:49   ` Gowans, James
2023-03-22  6:26     ` Yipeng Zou
2023-03-22  7:48       ` Gowans, James
2023-03-22 10:37         ` Thomas Gleixner
2023-04-03 13:17           ` zhangjianhua (E)
2023-04-03 13:19             ` Marc Zyngier
2023-04-03 13:39               ` Gowans, James
2023-03-22 10:38         ` Yipeng Zou
2023-04-09 11:41 ` Marc Zyngier
2023-04-11 10:27   ` Gowans, James
2023-04-12 13:32     ` Marc Zyngier
2023-04-18  2:39       ` Yipeng Zou
2023-04-18 10:56       ` Gowans, James
2023-04-19  3:08         ` Yipeng Zou
2023-05-02  8:43         ` Gowans, James
2023-05-23  3:16           ` liaochang (A)
2023-05-25 10:04             ` Gowans, James
2023-05-29  2:47               ` Liao, Chang
2023-05-30 21:47                 ` Gowans, James
     [not found]           ` <86sfcfghqh.wl-maz@kernel.org>
2023-05-23 12:47             ` Gowans, James
2023-05-25 12:31               ` Liao, Chang
2023-05-02 10:28         ` Marc Zyngier
2023-05-23  3:16       ` liaochang (A)
2023-05-23  3:15 ` liaochang (A)
2023-05-23 11:59   ` Gowans, James [this message]
2023-05-25 12:31     ` Liao, Chang

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