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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 7J0t86sJ0kjolEPVxtVKt_n-NRGSIYUg X-Proofpoint-GUID: 7J0t86sJ0kjolEPVxtVKt_n-NRGSIYUg X-Authority-Analysis: v=2.4 cv=c5Y+0h9l c=1 sm=1 tr=0 ts=6aa7b147 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=08BlROG3YVwwi0i9V5UA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE0MDEyMCBTYWx0ZWRfX2f3iFjo4M2UA g5XbVOq5sUhjROWk/2WZvH8yrsGb67k66mZT0WSq3Myi5bXEx++nljOUzyJApyVjNuSsAPg9qQ3 NMliBluK2A1Un1N3+cO82gVoe21cRhPUV4JKPkpFxaUFU2HyJ5j5LQobz5w20iCPOaXw4b6wHhb u/6TV+u1Yo7fo2BGV7vzfJLPGC49sFeiLFQ8/6gdXiQL74P6p9bQ0BMMnV8eUI0DH8496IfUyVr HXzeCc0DR9w5/hCVZPe2SLS2vNEvqvxjTFoN9/FuVav1UmiQQoK5cJ/Xzi0/ZxyuX+dB6BBYk3k G1BZ4KWn0P5XWEqxf2mJuURcABVvVzwpsEJaNVh1slCiu+PIuJriIgXASPKfw4HRt78nManFS67 i8qvEj+Ej2czioSvyZE5QycnvMPSQ9lAzivHYBD0uQBHkT9kMtdK0iynLWjo5+kCclUH5CvYvfQ 9kQ63iqVEnXB7Q8sQ+Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE0MDEyMCBTYWx0ZWRfX6Kuoj7u/S0Le aGHSUPVHWTBNbNmKbktfPMIqMuAfr49plEXUNCwn/ApguVIw6py7uGH3/MAqYn/S4iUYNfbkeP2 +QA1k/U9NQ0FlGJ6xzxsw9+qVgmUAG4= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-14_02,2026-09-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609140120 On 9/11/26 4:20 PM, Shawn Guo wrote: > From: Bartosz Golaszewski > > Add the base nodes for the three DWC3 USB controllers. These carry only > the SoC-invariant properties and are disabled by default. The extension > for the embedded Nord variant and relevant board files will add the > platform resources and enable them. [...] > + usb_2: usb@a200000 { > + compatible = "qcom,nord-dwc3", > + "qcom,snps-dwc3"; > + reg = <0x0 0x0a200000 0x0 0xfc100>; > + > + interrupts-extended = <&intc GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 7 IRQ_TYPE_EDGE_BOTH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "dp_hs_phy_irq", > + "dm_hs_phy_irq"; There's also a hs_phy_irq @ SPI 908 > + > + iommus = <&apps_smmu_0 0x14e0 0x0>; > + > + dma-coherent; > + wakeup-source; > + > + snps,dis-u1-entry-quirk; > + snps,dis-u2-entry-quirk; This is a suspiciously short list of quirks.. > + > + maximum-speed = "high-speed"; > + > + qcom,select-utmi-as-pipe-clk; > + > + status = "disabled"; > + }; > + > + usb_1: usb@a400000 { > + compatible = "qcom,nord-dwc3", > + "qcom,snps-dwc3"; > + reg = <0x0 0x0a400000 0x0 0xfc100>; > + > + interrupts-extended = <&intc GIC_SPI 917 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 918 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 41 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "dp_hs_phy_irq", > + "dm_hs_phy_irq", > + "ss_phy_irq"; hs_phy_irq @ SPI 919 > + > + iommus = <&apps_smmu_0 0x15c0 0x0>; > + > + dma-coherent; > + wakeup-source; > + > + snps,dis-u1-entry-quirk; > + snps,dis-u2-entry-quirk; > + > + status = "disabled"; > + }; > + > + usb_0: usb@a600000 { > + compatible = "qcom,nord-dwc3", > + "qcom,snps-dwc3"; > + reg = <0x0 0x0a600000 0x0 0xfc100>; > + > + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, > + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, > + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "dp_hs_phy_irq", > + "dm_hs_phy_irq", > + "ss_phy_irq"; hs_phy_irq @ SPI 131 Konrad