From: "Maíra Canal" <mcanal@igalia.com>
To: Lucas Tanure <lucas.tanure@neat.no>,
Maxime Ripard <mripard@kernel.org>,
Dave Stevenson <dave.stevenson@raspberrypi.com>
Cc: Dom Cobley <popcornmix@gmail.com>,
Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/3] drm/vc4: hdmi: enable scrambling before the TMDS clock starts
Date: Sat, 24 Oct 2026 10:34:47 -0300 [thread overview]
Message-ID: <f0beb8f6-2048-42a2-87c8-fd6b2f1de42a@igalia.com> (raw)
In-Reply-To: <20261020151948.83459-4-lucas.tanure@neat.no>
On 20/10/26 12:19, Lucas Tanure wrote:
> HDMI 2.0 requires a source to suspend the TMDS clock, write the
> TMDS_Bit_Clock_Ratio bit in the sink's SCDC registers, wait at least
> 1 ms and only then resume the clock. vc4 does the opposite: the PHY
> starts at the new rate first, and the SCDC bits are written tens of
> milliseconds later, at the very end of the enable sequence, together
> with the source side scrambler. On disable the bits are cleared while
> the clock is still running.
>
> Some sinks sample the bit only when the clock appears. One HDMI 2.0
> sink we tested then sets up its receiver for a 1/10 clock and never
> recovers: a Raspberry Pi 5 at 3840x2160@60 shows no picture, while
> 1080p60 and 4K30 work and other sources work at 4K60 on the same sink.
> Writing the bit by hand before enabling the output makes the same mode
> lock every time.
>
> Enable scrambling, on the sink and in the controller, before the PHY is
> started, and disable it only after the PHY has been stopped. The SCDC
> helper already waits the required time after writing the ratio bit.
>
Please add "Cc: stable@vger.kernel.org" to all your patches in the next
version.
> Fixes: c85695a2016e ("drm/vc4: hdmi: Enable the scrambler")
> Link: https://github.com/raspberrypi/linux/issues/7693
> Assisted-by: LLM
> Signed-off-by: Lucas Tanure <lucas.tanure@neat.no>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Best regards,
- Maíra
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index 4a386e053d3f..e57fc33af6b3 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -918,8 +918,6 @@ static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder,
> spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
> }
>
> - vc4_hdmi_disable_scrambling(encoder);
> -
> drm_dev_exit(idx);
>
> out:
> @@ -947,6 +945,8 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
> if (vc4_hdmi->variant->phy_disable)
> vc4_hdmi->variant->phy_disable(vc4_hdmi);
>
> + vc4_hdmi_disable_scrambling(encoder);
> +
> clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
> clk_disable_unprepare(vc4_hdmi->pixel_clock);
>
> @@ -1554,6 +1554,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
> goto err_disable_pixel_clock;
> }
>
> + vc4_hdmi_enable_scrambling(encoder);
> +
> if (vc4_hdmi->variant->phy_init)
> vc4_hdmi->variant->phy_init(vc4_hdmi, conn_state);
>
> @@ -1688,7 +1690,6 @@ static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
> }
>
> vc4_hdmi_recenter_fifo(vc4_hdmi);
> - vc4_hdmi_enable_scrambling(encoder);
>
> drm_dev_exit(idx);
>
prev parent reply other threads:[~2026-10-24 13:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-20 15:19 [PATCH v2 0/3] " Lucas Tanure
2026-10-20 15:19 ` [PATCH v2 1/3] drm/vc4: Implement vc6_hdmi_phy_disable Lucas Tanure
2026-10-24 13:13 ` Maíra Canal
2026-10-20 15:19 ` [PATCH v2 2/3] drm/vc4: hdmi: always cancel the scrambling work synchronously Lucas Tanure
2026-10-24 13:23 ` Maíra Canal
2026-10-20 15:19 ` [PATCH v2 3/3] drm/vc4: hdmi: enable scrambling before the TMDS clock starts Lucas Tanure
2026-10-24 13:34 ` Maíra Canal [this message]
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