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From: Ben Dooks <ben.dooks@codethink.co.uk>
To: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atishp@atishpatra.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] RISC-V: Increase range and default value of NR_CPUS
Date: Fri, 18 Mar 2022 14:46:52 +0000	[thread overview]
Message-ID: <f1079093-54db-bd20-3342-b06d069c5d1f@codethink.co.uk> (raw)
In-Reply-To: <20220317035542.272547-1-apatel@ventanamicro.com>

On 17/03/2022 03:55, Anup Patel wrote:
> Currently, the range and default value of NR_CPUS is too restrictive
> for high-end RISC-V systems with large number of HARTs. The latest
> QEMU virt machine supports upto 512 CPUs so the current NR_CPUS is
> restrictive for QEMU as well. Other major architectures (such as
> ARM64, x86_64, MIPS, etc) have a much higher range and default
> value of NR_CPUS.

What's the memory overhead for increasing this?

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html

  reply	other threads:[~2022-03-18 14:48 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-17  3:55 Anup Patel
2022-03-18 14:46 ` Ben Dooks [this message]
2022-03-18 15:14   ` Arnd Bergmann
2022-03-19 11:39     ` Anup Patel

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