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Tue, 20 Jan 2026 03:28:03 -0800 (PST) X-Received: by 2002:a05:6a20:1590:b0:387:5ded:994a with SMTP id adf61e73a8af0-38dfe77232bmr12008307637.60.1768908482513; Tue, 20 Jan 2026 03:28:02 -0800 (PST) Received: from [192.168.1.7] ([106.222.229.7]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a7190c9edesm120207135ad.23.2026.01.20.03.27.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Jan 2026 03:28:02 -0800 (PST) Message-ID: Date: Tue, 20 Jan 2026 16:55:26 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] arm64: dts: qcom: SM8750: Enable CPUFreq support To: Konrad Dybcio , Jagadeesh Kona Cc: Ajit Pandey , Imran Shaik , Taniya Das , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sibi Sankar , Jassi Brar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio References: <20251211-sm8750-cpufreq-v1-0-394609e8d624@oss.qualcomm.com> <20251211-sm8750-cpufreq-v1-2-394609e8d624@oss.qualcomm.com> <908b64f1-f6ac-4c5e-9c72-1174cba62017@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: <908b64f1-f6ac-4c5e-9c72-1174cba62017@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: TZljbaApJfq4uv68YlKF_TveGnJqXhvU X-Authority-Analysis: v=2.4 cv=eJMeTXp1 c=1 sm=1 tr=0 ts=696f66c3 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=dP73N8aTmtjQGoAWXS14bA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=ykpOodS9uqumO8t-MrQA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: TZljbaApJfq4uv68YlKF_TveGnJqXhvU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTIwMDA5MyBTYWx0ZWRfX4QDONVt0h9fW 7+0ToEZORlIGNg659PaRgiE/RRxjt7A7s73Ge+sr+8+V6uh9DO+odVljYsbXfFfiK5gqrHhO+jW KPs7svUaG3h3kJv/xUaUinSrzZZXZM1oqijxJ98lR6uHjp7kbv3vmXq7aMuuIVcAvihL//sqO+6 O5eAgkNp50c0wFYMmmSGMp7Ojtu4OhDTkFcORHeOFIFUX1rn7x+AUlX3N8Efag1fy9saxiwAMv0 CSt7TnyHRyPkmyfPpFjxv733CkGkT2PY12TG9VqJaa9epyzFL8gsJKTMCev5usGSMXUmWCaEL49 qbPpmog/SWiMI9uF/KGszCql72eMpa0vRArKb4ZWZMU3+TF3PchBWfkD0D6FmQUmfPoVqnuYS9m 3FYtwpOXr/BFM0aV4glfAt2c9Uv6DMjxX1pS50/hZ+se9edaDwXW2ZwCsH21Y7p8XT8GTZpv88t Pmu461CJWoUcLF3YEDw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-20_03,2026-01-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601200093 On 1/20/2026 3:44 PM, Konrad Dybcio wrote: > On 1/19/26 8:00 PM, Akhil P Oommen wrote: >> On 12/11/2025 12:32 AM, Jagadeesh Kona wrote: >>> Add the cpucp mailbox, sram and SCMI nodes required to enable >>> the CPUFreq support using the SCMI perf protocol on SM8750 SoCs. >>> >>> Signed-off-by: Jagadeesh Kona >> >> Just curious, does this patch enable thermal mitigation for CPU clusters >> too? > > If nothing changed, we have lets-not-explode type mitigations via LMH, > but lets-not-burn-the-user would require a skin temp sensor to be > wired up, which then could be used to enable some cooling action In some chipsets, I have noticed that the gpu cooling device throttles GPU to the lowest OPP even with not-so-heavy GPU workloads, making it unusable-ly slow. My hypothesis was that it was due to unmitigated CPU temperature tripping up GPU Tsens. So, I am wondering if there are any additional CPU cooling related changes required to get a reasonable overall performance under thermal constraints. -Akhil. > > Konrad