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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b046f888b95sm82236666b.34.2025.09.03.05.26.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Sep 2025 05:26:34 -0700 (PDT) Message-ID: Date: Wed, 3 Sep 2025 14:26:30 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/6] arm64: dts: qcom: sa8775p: Add gpu and gmu nodes To: Akhil P Oommen , Sean Paul , Konrad Dybcio , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Connor Abbott , Srinivas Kandagatla , Rob Clark , Dmitry Baryshkov Cc: Gaurav Kohli , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Puranam V G Tejaswi References: <20250822-a663-gpu-support-v4-0-97d26bb2144e@oss.qualcomm.com> <20250822-a663-gpu-support-v4-3-97d26bb2144e@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250822-a663-gpu-support-v4-3-97d26bb2144e@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: WvbQf1wCUhJSwbSmqKXzU3aT60LFmhnk X-Proofpoint-GUID: WvbQf1wCUhJSwbSmqKXzU3aT60LFmhnk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAyMCBTYWx0ZWRfX2+Zez9Z1B0dp JHF0VGEXzSHNU+NO56zP6EIFy/AJyhVtkm5EBIBkY08nwKuEoN8spsMtrOGuu3SqzSBV27JCfxk tpYbY6smvDLQevypubShqv97sDNIlvIzM/CX9tfsttj8XblQyGhvzo0zhcehscgz1zRKRAYSqyX SV0NOSQRVsTqRn3bX5G/AleR1m5QhN+mdTHUrUMXXF/WhwiU+TsEyl5Su4peWlDcp0uRlhBJXdR RFEHcmYrHO1fC0PSV1AH+z6pP2t/bIkJD4ewJaNMNDK8bxMsptLnMIWXQKS+e0KnkzSe9irHUJw IPny8ENV4TAiEmWDm096ZdXjzTPipl2jeJLR1TtPdkBLdpeZHl8kPXguBWtoZQApl2yzk2VbO7s pK3N1o8c X-Authority-Analysis: v=2.4 cv=VNndn8PX c=1 sm=1 tr=0 ts=68b833fc cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=-ORaCNUFwIs1vMjdVOkA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-03_06,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 impostorscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300020 On 8/21/25 8:55 PM, Akhil P Oommen wrote: > From: Puranam V G Tejaswi > > Add gpu and gmu nodes for sa8775p chipset. As of now all > SKUs have the same GPU fmax, so there is no requirement of > speed bin support. > > Signed-off-by: Puranam V G Tejaswi > Signed-off-by: Akhil P Oommen > Reviewed-by: Dmitry Baryshkov > --- > arch/arm64/boot/dts/qcom/lemans.dtsi | 116 +++++++++++++++++++++++++++++++++++ > 1 file changed, 116 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi > index 8ceb59742a9fc6562b2c38731ddabe3a549f7f35..8eac8d4719db9230105ad93ac22287850b6b007c 100644 > --- a/arch/arm64/boot/dts/qcom/lemans.dtsi > +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi > @@ -1097,6 +1097,18 @@ ipcc: mailbox@408000 { > #mbox-cells = <2>; > }; > > + qfprom: efuse@784000 { > + compatible = "qcom,sa8775p-qfprom", "qcom,qfprom"; > + reg = <0x0 0x00784000 0x0 0x2410>; len = 0x3000 [...] > + gmu: gmu@3d6a000 { > + compatible = "qcom,adreno-gmu-663.0", "qcom,adreno-gmu"; > + reg = <0x0 0x03d6a000 0x0 0x34000>, This bleeds into GPU_CC, len should be 0x26000 > + <0x0 0x03de0000 0x0 0x10000>, > + <0x0 0x0b290000 0x0 0x10000>; > + reg-names = "gmu", "rscc", "gmu_pdc"; > + interrupts = , > + ; > + interrupt-names = "hfi", "gmu"; > + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, > + <&gpucc GPU_CC_CXO_CLK>, > + <&gcc GCC_DDRSS_GPU_AXI_CLK>, > + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, > + <&gpucc GPU_CC_AHB_CLK>, > + <&gpucc GPU_CC_HUB_CX_INT_CLK>, > + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; This clock only belongs in the SMMU node > + clock-names = "gmu", > + "cxo", > + "axi", > + "memnoc", > + "ahb", > + "hub", > + "smmu_vote"; > + power-domains = <&gpucc GPU_CC_CX_GDSC>, > + <&gpucc GPU_CC_GX_GDSC>; > + power-domain-names = "cx", > + "gx"; > + iommus = <&adreno_smmu 5 0xc00>; > + operating-points-v2 = <&gmu_opp_table>; > + > + gmu_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; 500 MHz @ RPMH_REGULATOR_LEVEL_SVS, 200 isn't even present in the clock driver Konrad