From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756824AbdEHTuL (ORCPT ); Mon, 8 May 2017 15:50:11 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11610 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754862AbdEHTuJ (ORCPT ); Mon, 8 May 2017 15:50:09 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 912613B71B Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jcm@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 912613B71B Subject: Re: [PATCH] ACPI: SPCR: Use access width to determine mmio usage To: Loc Ho References: <1493910330-17913-1-git-send-email-jon.mason@broadcom.com> <4e11bb2b-7cec-6a7b-ca2b-88be31a98b7d@redhat.com> Cc: Jon Mason , Rafael Wysocki , Len Brown , Robert Moore , Lv Zheng , linux-acpi@vger.kernel.org, Linux Kernel Mailing List , devel@acpica.org, bcm-kernel-feedback-list@broadcom.com From: Jon Masters Message-ID: Date: Mon, 8 May 2017 15:50:05 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 08 May 2017 19:50:09 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/08/2017 03:11 PM, Loc Ho wrote: > Hi Jon, > >>> The current SPCR code does not check the access width of the mmio, and >>> uses a default of 8bit register accesses. This prevents devices that >>> only do 16 or 32bit register accesses from working. By simply checking >>> this field and setting the mmio string appropriately, this issue can be >>> corrected. To prevent any legacy issues, the code will default to 8bit >>> accesses if the value is anything but 16 or 32. >> >> Thanks for this. Just as an FYI I've a running discussion with Microsoft >> about defining additional UART subtypes in the DBG2 for special case >> UARTs. Specifically, I want to address AppliedMicro's special 8250 dw IP >> that also has a non-standard clock. At this time, there is general >> agreement to use the access width for some cases rather than defining >> yet more subtypes - so your patch is good. >> >> Loc/Applied: please track this thread, incorporate feedback, and also >> track the other general recent discussions of 8250 dw from this week. > > Thanks for forward me this patch. This patch does not work with X-Gene > v1 and v2 SoC's. As BIOS SPCR encodes these info as: > > Bit Width: 32 > Bit Offset: 0 > Encoded Access Width: 01 (Byte Access) > > With this patch, it would use the "mmio" instead the "mmio32" as with > this patch - https://patchwork.kernel.org/patch/9460959 I think this is why we need the DBG2 subtype for Applied X-Gene1. I'm hoping the update to the SPCR/DBG2 spec is done soon. Jon. -- Computer Architect | Sent from my Fedora powered laptop