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Thu, 17 Sep 2026 08:41:41 -0700 (PDT) Received: from Lord-Beerus.station ([31.27.155.43]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fbd227141sm100124235e9.2.2026.09.17.08.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 08:41:41 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: Frank Li , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Francesco Ferraro Subject: [PATCH v2 1/3] arm64: dts: imx8mm-var-dart: configure SAI3 synchronous RX mode Date: Thu, 17 Sep 2026 17:41:28 +0200 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Stefano Radaelli Configure SAI3 to operate in synchronous RX mode, so that the trasmit path uses the receive bit clock and frame sync signals. Remove the TX_SYNC and TX_BCLK pinmux entries, as these signals are not used in this configuration. Co-developed-by: Francesco Ferraro Signed-off-by: Francesco Ferraro Signed-off-by: Stefano Radaelli --- v1->v2: - arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi index 2324063f8fd9..c7a9eb23e5e8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-dart.dtsi @@ -305,6 +305,7 @@ &sai3 { assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; assigned-clock-rates = <1536000>; fsl,sai-mclk-direction-output; + fsl,sai-synchronous-rx; status = "okay"; }; @@ -446,8 +447,6 @@ pinctrl_sai3: sai3grp { MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0xd6 MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0xd6 MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 - MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 - MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 >; -- 2.47.3