From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 787DFC04EB9 for ; Mon, 3 Dec 2018 12:12:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 406E720851 for ; Mon, 3 Dec 2018 12:12:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 406E720851 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726521AbeLCMNQ (ORCPT ); Mon, 3 Dec 2018 07:13:16 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:55614 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726369AbeLCMNQ (ORCPT ); Mon, 3 Dec 2018 07:13:16 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id wB3CCLRg105209; Mon, 3 Dec 2018 06:12:21 -0600 Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wB3CCK7l113801 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 3 Dec 2018 06:12:21 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 3 Dec 2018 06:12:20 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 3 Dec 2018 06:12:20 -0600 Received: from [172.24.190.215] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wB3CCHMB024819; Mon, 3 Dec 2018 06:12:17 -0600 Subject: Re: [PATCH V3 1/3] mmc: sdhci: add support for using external DMA devices To: Chunyan Zhang , Ulf Hansson , Adrian Hunter CC: , , Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang References: <1542007566-9449-2-git-send-email-zhang.chunyan@linaro.org> <1543471664-22856-1-git-send-email-zhang.chunyan@linaro.org> From: Faiz Abbas Message-ID: Date: Mon, 3 Dec 2018 17:45:06 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <1543471664-22856-1-git-send-email-zhang.chunyan@linaro.org> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 29/11/18 11:37 AM, Chunyan Zhang wrote: > Some standard SD host controllers can support both external dma > controllers as well as ADMA/SDMA in which the SD host controller > acts as DMA master. TI's omap controller is the case as an example. > > Currently the generic SDHCI code supports ADMA/SDMA integrated in > the host controller but does not have any support for external DMA > controllers implemented using dmaengine, meaning that custom code is > needed for any systems that use an external DMA controller with SDHCI. > > Signed-off-by: Chunyan Zhang > --- > drivers/mmc/host/Kconfig | 14 ++++ > drivers/mmc/host/sdhci.c | 185 ++++++++++++++++++++++++++++++++++++++++++++++- > drivers/mmc/host/sdhci.h | 8 ++ > 3 files changed, 206 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig > index 1b58739..4183f43 100644 > --- a/drivers/mmc/host/Kconfig > +++ b/drivers/mmc/host/Kconfig > @@ -969,6 +969,7 @@ config MMC_SDHCI_XENON > config MMC_SDHCI_OMAP > tristate "TI SDHCI Controller Support" > depends on MMC_SDHCI_PLTFM && OF > + select MMC_SDHCI_EXTERNAL_DMA if DMA_ENGINE > help > This selects the Secure Digital Host Controller Interface (SDHCI) > support present in TI's DRA7 SOCs. The controller supports > @@ -977,3 +978,16 @@ config MMC_SDHCI_OMAP > If you have a controller with this interface, say Y or M here. > > If unsure, say N. > + > +config MMC_SDHCI_EXTERNAL_DMA > + bool "Support external DMA in standard SD host controller" > + depends on MMC_SDHCI > + depends on DMA_ENGINE > + help > + This is an option for using external DMA device via dmaengine > + framework. > + > + If you have a controller which support using external DMA device > + for data transfer, can say Y. > + > + If unsure, say N. > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 99bdae5..ad7cc80 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -14,6 +14,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -1309,6 +1310,162 @@ static void sdhci_del_timer(struct sdhci_host *host, struct mmc_request *mrq) > del_timer(&host->timer); > } > > +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA) > +static int sdhci_external_dma_init(struct sdhci_host *host) > +{ > + int ret = 0; > + struct mmc_host *mmc = host->mmc; > + > + host->tx_chan = dma_request_chan(mmc->parent, "tx"); > + if (IS_ERR(host->tx_chan)) { > + ret = PTR_ERR(host->tx_chan); > + if (ret != -EPROBE_DEFER) > + pr_warn("Failed to request TX DMA channel.\n"); > + host->tx_chan = NULL; > + return ret; > + } > + > + host->rx_chan = dma_request_chan(mmc->parent, "rx"); > + if (IS_ERR(host->rx_chan)) { > + if (host->tx_chan) { > + dma_release_channel(host->tx_chan); > + host->tx_chan = NULL; > + } > + > + ret = PTR_ERR(host->rx_chan); > + if (ret != -EPROBE_DEFER) > + pr_warn("Failed to request RX DMA channel.\n"); > + host->rx_chan = NULL; > + } > + > + return ret; > +} > + > +static inline struct dma_chan * > +sdhci_external_dma_channel(struct sdhci_host *host, struct mmc_data *data) > +{ > + return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; > +} > + > +static int sdhci_external_dma_setup(struct sdhci_host *host, > + struct mmc_command *cmd) > +{ > + int ret, i; > + struct dma_async_tx_descriptor *desc; > + struct mmc_data *data = cmd->data; > + struct dma_chan *chan; > + struct dma_slave_config cfg; > + dma_cookie_t cookie; > + > + if (!host->mapbase) > + return -EINVAL; > + > + if (!data) > + return 0; > + > + cfg.src_addr = host->mapbase + SDHCI_BUFFER; > + cfg.dst_addr = host->mapbase + SDHCI_BUFFER; > + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > + cfg.src_maxburst = data->blksz / 4; > + cfg.dst_maxburst = data->blksz / 4; > + > + /* Sanity check: all the SG entries must be aligned by block size. */ > + for (i = 0; i < data->sg_len; i++) { > + if ((data->sg + i)->length % data->blksz) > + return -EINVAL; > + } > + > + chan = sdhci_external_dma_channel(host, data); > + > + ret = dmaengine_slave_config(chan, &cfg); > + if (ret) > + return ret; > + > + desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, > + mmc_get_dma_dir(data), > + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); > + if (!desc) > + return -EINVAL; > + > + desc->callback = NULL; > + desc->callback_param = NULL; > + > + cookie = dmaengine_submit(desc); > + if (cookie < 0) > + ret = cookie; > + > + return ret; > +} > + > +static void sdhci_external_dma_release(struct sdhci_host *host) > +{ > + if (host->tx_chan) { > + dma_release_channel(host->tx_chan); > + host->tx_chan = NULL; > + } > + > + if (host->rx_chan) { > + dma_release_channel(host->rx_chan); > + host->rx_chan = NULL; > + } > + > + sdhci_switch_external_dma(host, false); > +} > + > +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, > + struct mmc_command *cmd) > +{ Please add a condition for data == NULL here. This was already pointed out by Adrian in v2. My test with an am335x-evm failed with these patches. Looks like the very first SDIO commands failing. https://pastebin.ubuntu.com/p/Y2RDjSKpgd/ Currently am335x-evm is using omap_hsmmc driver. I added the following patch to make it work with sdhci_omap. https://pastebin.ubuntu.com/p/VTGrCbJxY3/ Will look deeper into this. Please ping if you need any more information. Thanks, Faiz