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Mon, 29 Jul 2024 10:47:10 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46TAl98n026553 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Jul 2024 10:47:09 GMT Received: from [10.239.132.204] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 29 Jul 2024 03:47:06 -0700 Message-ID: Date: Mon, 29 Jul 2024 18:47:03 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] arm64: dts: qcom: sa8775p: Add UART node To: Konrad Dybcio , Krzysztof Kozlowski , Viken Dadhaniya , , , , , , , CC: , , Tingwei , "Aiqun(Maria) Yu" References: <20240710094149.13299-1-quic_vdadhani@quicinc.com> <2e309d52-8180-4922-9a5a-022fc8bf8ef5@kernel.org> From: Tengfei Fan In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zzi39QicOOrkfOXe103u-luHm4fcb9V4 X-Proofpoint-ORIG-GUID: zzi39QicOOrkfOXe103u-luHm4fcb9V4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-29_09,2024-07-26_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407290073 On 7/10/2024 6:39 PM, Konrad Dybcio wrote: > On 10.07.2024 11:47 AM, Krzysztof Kozlowski wrote: >> On 10/07/2024 11:41, Viken Dadhaniya wrote: >>> Add missing UART configuration for sa8775. >>> >>> Signed-off-by: Viken Dadhaniya >>> --- >>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 231 ++++++++++++++++++++++++++ >>> 1 file changed, 231 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> index 23f1b2e5e624..c107ee40341d 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi >>> @@ -1,6 +1,7 @@ >>> // SPDX-License-Identifier: BSD-3-Clause >>> /* >>> * Copyright (c) 2023, Linaro Limited >>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. >>> */ >>> >>> #include >>> @@ -657,6 +658,21 @@ >>> status = "disabled"; >>> }; >>> >>> + uart14: serial@880000 { >>> + compatible = "qcom,geni-uart"; >>> + reg = <0x0 0x00880000 0x0 0x4000>; >>> + interrupts = ; >>> + clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; >>> + clock-names = "se"; >>> + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS >>> + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, >>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>> + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>; >>> + interconnect-names = "qup-core", "qup-config"; >>> + power-domains = <&rpmhpd SA8775P_CX>; >> >> All the clocks, interconenct and power domains look to me questionable. >> AFAIK, most of it (if not all) is going to be removed. > > Yeah.. I'm lukewarm on accepting any sa8775p changes until that qcs9100(?) > situation is squared out first > > Konrad After considering the feedback provided on the subject, We have decided to keep current SA8775p compatible and ABI compatibility in drivers. Therefore, this patch is still needed, please continue to review this patch. Thank you for your input. -- Thx and BRs, Tengfei Fan