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Tue, 27 Apr 2021 07:19:24 -0700 Envelope-to: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patrice.chotard@st.com, daniel.lezcano@linaro.org, tglx@linutronix.de, andrea.merello@gmail.com Received: from [172.30.17.109] (port=50338) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lbOYd-0004pS-PD; Tue, 27 Apr 2021 07:19:24 -0700 Subject: Re: [PATCH v2 0/2] Fix missing entropy on Zynq arch due to get_cycles() not supported To: Andrea Merello , , CC: Patrice Chotard , , , Michal Simek , =?UTF-8?Q?S=c3=b6ren_Brinkmann?= References: <20210406130045.15491-1-andrea.merello@gmail.com> From: Michal Simek Message-ID: Date: Tue, 27 Apr 2021 16:19:20 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.0 MIME-Version: 1.0 In-Reply-To: <20210406130045.15491-1-andrea.merello@gmail.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: abdb8647-eb48-4b63-4a21-08d909877f33 X-MS-TrafficTypeDiagnostic: DM6PR02MB4170: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Apr 2021 14:19:40.8214 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: abdb8647-eb48-4b63-4a21-08d909877f33 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT016.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB4170 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 4/6/21 3:00 PM, Andrea Merello wrote: > Changes wrt v1: > - rebased on latest kernel tree > - fix cover letter: does -> doesn't > > A real-world problem has been seen with a Zynq-based board running > Debian 10, where ssh daemon takes a really long time to come up at boot. > This is due to lack of random numbers. > > Since commit 50ee7529ec450 ("random: try to actively add entropy rather > than passively wait for it") we try to generate entropy whenever we are > in short of random numbers and someone needs them. > > This trick works only when CPU cycle counter is available. On ARM this > means that get_cycles() works and in turn read_current_timer() works. > > Zynq HW includes two "cadence TTC" timers and the "ARM global timer". > All these pieces of HW are fed by the CPU clock, which dynamically > changes whenever CPU frequency scaling is enabled. > > In timer-cadence-ttc driver this scenario is handled by looking at parent > clock changes and adjusting things when required. This is the only usable > clocksource when CPU frequency scaling is in use. arm_global_timer driver > is disabled in Kconfig when CPU_FREQ is enabled for Zynq arch. > > Unfortunately timer-cadence-ttc driver doesn't register itself via > register_current_timer_delay() and that ultimately ends up in get_cycles() > to always return zero, causing the aforementioned lack of entropy problem. > I believe that the reason for this is because Cadence TTC counter on Zynq > silicon is only 16-bit wide. > > This patchset works around this by implementing in ARM global timer driver > a mechanism to compensate for parent clock variations, similarly to what > it's done in Cadence TTC timer driver, so that it can be used together > with CPU frequency scaling on Zynq arch. > > This proved to finally fix the problem on my Zynq-based Z-turn board. > > Signed-off-by: Andrea Merello > Cc: Patrice Chotard > Cc: linux-kernel@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: Michal Simek > Cc: Sören Brinkmann > > Andrea Merello (2): > clocksource: arm_global_timer: implement rate compensation whenever > source clock changes > arm: zynq: don't disable CONFIG_ARM_GLOBAL_TIMER due to > CONFIG_CPU_FREQ anymore > > arch/arm/mach-zynq/Kconfig | 2 +- > drivers/clocksource/Kconfig | 14 +++ > drivers/clocksource/arm_global_timer.c | 122 +++++++++++++++++++++++-- > 3 files changed, 127 insertions(+), 11 deletions(-) > > -- > 2.17.1 > I have no problem with these patches. I have tested it on zc706 board and I see performance improvement when I generate random numbers. Only question what I have is if ARM_GT_INITIAL_PRESCALER_VAL=2 make sense also for others SoC with multi_v7_defconfig. Other than this feel free to add my Acked-by: Michal Simek Tested-by: Michal Simek (on Zynq) Daniel: Can you please take a look at this series? Thanks, Michal