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From: Manuel Ebner <manuelebnerli@mailbox.org>
To: Harendra Gautam <harendra.gautam@oss.qualcomm.com>,
	Srinivas Kandagatla <srini@kernel.org>
Cc: Mark Brown <broonie@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Jaroslav Kysela	 <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
	linux-sound@vger.kernel.org,  linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org,  linux-kernel@vger.kernel.org,
	Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>,
	Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>,
	 Kumar Anurag Singh <kumar.singh@oss.qualcomm.com>,
	Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Subject: Re: [PATCH v3 1/9] ASoC: dt-bindings: qcom,qaif-cpu: Add binding
Date: Mon, 24 Aug 2026 10:39:05 +0200	[thread overview]
Message-ID: <f24970d3ec28f6b8f57e7c139d0daa2cb5128492.camel@mailbox.org> (raw)
In-Reply-To: <20260824063627.3595610-2-harendra.gautam@oss.qualcomm.com>

Hi

On Mon, 2026-08-24 at 12:06 +0530, Harendra Gautam wrote:
> QAIF routes audio between system memory, external PCM/TDM/MI2S serial
> interfaces and the internal Bolero/WCD codec. Platform Devicetree files
> need a binding to describe the controller resources, DAI cells and per-
> interface AIF configuration, and named constants to avoid raw numeric IDs
> in sound-dai references and child-node reg values.
> 
> Describe the MMIO region, interrupt, clocks, DMA IOMMU mapping and
> aif-interface child nodes required by the controller.
> 
> Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
> ---
>  .../bindings/sound/qcom,qaif-cpu.yaml         | 307 ++++++++++++++++++
>  include/dt-bindings/sound/qcom,qaif.h         |  97 ++++++
>  2 files changed, 404 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml
>  create mode 100644 include/dt-bindings/sound/qcom,qaif.h
> 
> diff --git a/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml
> new file mode 100644
> index 000000000000..134356114733
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml
> @@ -0,0 +1,307 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/qcom,qaif-cpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#

Both of the links redirect to https://www.devicetree.org/

> 
> ...
> 
> diff --git a/include/dt-bindings/sound/qcom,qaif.h b/include/dt-bindings/sound/qcom,qaif.h
> new file mode 100644
> index 000000000000..24706efd07d1
> --- /dev/null
> +++ b/include/dt-bindings/sound/qcom,qaif.h
> @@ -0,0 +1,97 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + *
> + * DAI IDs for the Qualcomm Audio Interface (QAIF) controller.
> + * QAIF_MI2S_AIF* and QAIF_TDM_AIF* values are used in sound-dai
> + * references and as the reg value of aif@N child nodes.
> + * QAIF_CDC_DMA_* values are for sound-dai references only and must
> + * not be used as aif@N child node reg values.
> + */
> +#ifndef __DT_QCOM_QAIF_H
> +#define __DT_QCOM_QAIF_H
> +
> +/*
> + * MI2S DAI IDs -- one per physical AIF port in MI2S mode.
> + * Each port supports up to 2 channels (stereo I2S) over a single
> + * data lane sharing a bit clock and frame sync.
> + */
> +#define QAIF_MI2S_AIF0		200
> +#define QAIF_MI2S_AIF1		201
> +#define QAIF_MI2S_AIF2		202
> +#define QAIF_MI2S_AIF3		203
> +#define QAIF_MI2S_AIF4		204
> +#define QAIF_MI2S_AIF5		205
> +#define QAIF_MI2S_AIF6		206
> +#define QAIF_MI2S_AIF7		207
> +#define QAIF_MI2S_AIF8		208
> +#define QAIF_MI2S_AIF9		209
> +#define QAIF_MI2S_AIF10		210
> +#define QAIF_MI2S_AIF11		211
> +#define QAIF_MI2S_AIF12		212
> +
> +/*
> + * TDM DAI IDs -- one per physical AIF port in TDM mode.

Is this sentence complete?

> + * Each port supports up to 8 channels over up to 8 independent data
> + * lanes sharing a single bit clock and frame sync.
> + */
> 
> ...

Thanks
 Manuel

  reply	other threads:[~2026-08-24  8:39 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24  6:36 [PATCH v3 0/9] ASoC: qcom: Add QAIF driver for Shikra audio platform Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 1/9] ASoC: dt-bindings: qcom,qaif-cpu: Add binding Harendra Gautam
2026-08-24  8:39   ` Manuel Ebner [this message]
2026-08-24  9:14     ` Harendra Gautam
2026-08-25  5:59     ` Krzysztof Kozlowski
2026-08-26  8:31   ` Mohammad Rafi Shaik
2026-08-26  9:39     ` Harendra Gautam
2026-08-26  9:43       ` Srinivas Kandagatla
2026-08-26  9:55         ` Harendra Gautam
2026-08-26 10:01           ` Srinivas Kandagatla
2026-08-26 10:06             ` Harendra Gautam
2026-08-26 10:25               ` Harendra Gautam
2026-08-28  8:58             ` Harendra Gautam
2026-08-28 12:37               ` Srinivas Kandagatla
2026-08-28 12:42                 ` Srinivas Kandagatla
2026-08-29  9:10                   ` Harendra Gautam
2026-09-01  5:11                   ` Prasad Kumpatla
2026-09-01  7:57                     ` Harendra Gautam
2026-08-26 23:32     ` Mark Brown
2026-08-27  4:00       ` Harendra Gautam
2026-09-01  6:14   ` Prasad Kumpatla
2026-09-01  8:06     ` Harendra Gautam
2026-09-01 11:59       ` Krzysztof Kozlowski
2026-09-01 14:46         ` Harendra Gautam
2026-09-01 14:56           ` Krzysztof Kozlowski
2026-09-01 16:31             ` Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 2/9] ASoC: qcom: Add QAIF shared data structures and variant interface Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 3/9] ASoC: qcom: Add QAIF hardware register map Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 4/9] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 5/9] ASoC: soc-core: Add snd_soc_of_xlate_dai_name() generic helper Harendra Gautam
2026-08-25  4:20   ` Kuninori Morimoto
2026-08-24  6:36 ` [PATCH v3 6/9] ASoC: qcom: Add QAIF PCM operations Harendra Gautam
2026-08-24  9:25   ` Markus Elfring
2026-08-24 10:10     ` Harendra Gautam
2026-08-25  6:07       ` Krzysztof Kozlowski
2026-08-24  6:36 ` [PATCH v3 7/9] ASoC: qcom: Add QAIF IRQ handling, suspend/resume and platform register Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 8/9] ASoC: qcom: Add Shikra QAIF support Harendra Gautam
2026-08-26  8:35   ` Mohammad Rafi Shaik
2026-08-26  8:58     ` Harendra Gautam
2026-08-26 10:13       ` Srinivas Kandagatla
2026-08-26 10:37         ` Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 9/9] MAINTAINERS: Add Qualcomm QAIF driver entry Harendra Gautam
2026-08-24  8:22   ` Abel Vesa
2026-08-24  8:31     ` Harendra Gautam

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