From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756460AbdJPSLg (ORCPT ); Mon, 16 Oct 2017 14:11:36 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:5365 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752955AbdJPSLf (ORCPT ); Mon, 16 Oct 2017 14:11:35 -0400 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 16 Oct 2017 11:11:27 -0700 Subject: Re: [PATCH v5 00/13] gpio: Tight IRQ chip integration To: Linus Walleij CC: Thierry Reding , Grygorii Strashko , , , References: <20171013154913.29448-1-thierry.reding@gmail.com> From: Jon Hunter Message-ID: Date: Mon, 16 Oct 2017 19:09:08 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171013154913.29448-1-thierry.reding@gmail.com> X-Originating-IP: [10.26.11.183] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus, On 13/10/17 16:49, Thierry Reding wrote: > From: Thierry Reding > > Hi Linus, > > here's the latest series of patches that implement the tighter IRQ chip > integration. I've dropped the banked infrastructure for now as per the > discussion with Grygorii. > > The first couple of patches are mostly preparatory work in order to > consolidate all IRQ chip related fields in a new structure and create > the base functionality for adding IRQ chips. > > After that, I've added the Tegra186 GPIO support patch that makes use of > the new tight integration. I have reviewed this series and tested on Tegra, so for the series ... Reviewed-by: Jon Hunter Tested-by: Jon Hunter We would really like to get support for Tegra186 GPIO in v4.15, so please let us know if you think that this is do-able. Cheers Jon -- nvpublic