From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 813DD3E9284 for ; Mon, 30 Mar 2026 22:56:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911401; cv=none; b=DAODsHNz+s+RnCsqhG5i7Tei/T40VZjbxTAwRePY1xxlLycT+APEmcjMAslfX3Av9Cramihm1iOQHQDo4rsG/r8pEUmHyBZMcR/Gsw/suKOtTB/ToabexmB62MBbwrmDxE47yYwp7befFlcJ7YlLIRx/4GYPLaF0kK03cmclFxA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911401; c=relaxed/simple; bh=iMI9J6wlQN678sFaWi+2un61tjW/vjxUuuKzfWAUal8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HvJSIH/y3G9njHKVMSxzaYHlDis4D71Nig5dVcisP45rxm6fstktjiXN/rWpLVlg7gOMJK86ap9KTno0oxV+ub3rbAnk/rXBZSpi8DwkNwvxAXHs5dNxyGwrVIbA/nhGJMho7mNcijsm4oS2RDoPIucnLBXBClH2wykwPUQslEk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=cpZq751Y; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="cpZq751Y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1774911393; bh=iMI9J6wlQN678sFaWi+2un61tjW/vjxUuuKzfWAUal8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=cpZq751Y3ckqzSYnL3Vvkr4ADYrvwghibjE1ZhibpowINr2988K0r+woqtp6iD/+h S/5rlRhNyBEVTwAgvvW3GoN37oY0wcD9YnjK99bOORSLBB/5vj1gb5mmjQHTTmXb0J 0u2yLsZrnVxrbkIjRqOd+N5PkyrSYzYmEQMX+Ld4VwU03sqtOkOENW4CU2QXiLsCix 2Vivr7y1rPL11yDRsZgKqECFx0JDMvkNup7SiTED3bXmXQeBBOxXnltjrgjmcATy3C 4RqVTuWMX8F65nREkvVfGeNdl+t1yb87YBRihrBi6BKcczi7M6jcy7Dw+Cf1nYdeMB Mo/rplpIvG3fw== Received: from [192.168.1.57] (host-79-18-8-236.retail.telecomitalia.it [79.18.8.236]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 20CF217E517F; Tue, 31 Mar 2026 00:56:33 +0200 (CEST) Message-ID: Date: Tue, 31 Mar 2026 01:56:32 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] phy: hdmi: Add FRL TxFFE level control To: Vladimir Oltean Cc: Vinod Koul , Neil Armstrong , Heiko Stuebner , kernel@collabora.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org References: <20260328-hdptx-ffe-v1-0-53ebd5dea20a@collabora.com> <20260330085723.4rewkbs76lz3scum@skbuf> Content-Language: en-US From: Cristian Ciocaltea In-Reply-To: <20260330085723.4rewkbs76lz3scum@skbuf> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 3/30/26 11:57 AM, Vladimir Oltean wrote: > On Sat, Mar 28, 2026 at 03:54:53PM +0200, Cristian Ciocaltea wrote: >> During HDMI 2.1 Fixed Rate Link training, the source and sink may >> negotiate a Transmitter Feed Forward Equalizer (TxFFE) level to >> compensate for signal quality degradation on the physical channel. The >> source starts at level 0 and may increment it up to a maximum agreed >> upon during LTS3 in response to persistent link failures reported by the >> sink. TxFFE adjustment is optional and entirely independent of the FRL >> rate and lane count selection. >> >> Patch 1 extends the HDMI PHY configuration API with two new fields in >> the frl sub-struct: ffe_level to carry the requested level, and a >> set_ffe_level flag that switches the semantics of a phy_configure() call >> to a pure equalizer update, leaving all other fields ignored. >> >> Patch 2 implements the new interface in the Rockchip Samsung HDPTX PHY >> driver. >> >> The series depends on the "[PATCH 0/6] phy: rockchip: samsung-hdptx: >> Clock fixes and API transition cleanups" patchset: >> >> https://lore.kernel.org/all/20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com/ >> >> Signed-off-by: Cristian Ciocaltea >> --- >> Cristian Ciocaltea (2): >> phy: hdmi: Add optional FRL TxFFE config options >> phy: rockchip: samsung-hdptx: Add support for FRL TxFFE level control >> >> drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 74 +++++++++++++++++++++-- >> include/linux/phy/phy-hdmi.h | 6 ++ >> 2 files changed, 75 insertions(+), 5 deletions(-) >> --- >> base-commit: f7b64ed948718290209074a50bb0df17e5944873 >> change-id: 20260328-hdptx-ffe-a89c51e66904 >> prerequisite-change-id: 20260227-hdptx-clk-fixes-47426632f862:v1 >> prerequisite-patch-id: 5c1d442fae39103bb758f54738aff33d2491401d >> prerequisite-patch-id: b86f30292308345387d2a6b50949ad040b931592 >> prerequisite-patch-id: b1335105db9177cb10c64ed1bf0867832e6aac2f >> prerequisite-patch-id: 83db6603d13e19f239e89fde2b26366eb0106b7e >> prerequisite-patch-id: b534395ad315811861f11859a3946f65c90c631a >> prerequisite-patch-id: f9637e57c902f35218cda658397416f84f7285cb > > Sorry for my ignorance; who is supposed to act upon this git-format-patch > base tree information and in what way? > > As things stand today, the build infrastructure we have in place will > not be able to apply and test your series unless it applies directly > onto the linux-phy/next branch. Oh, I assumed that since b4 makes managing series dependencies straightforward on the preparation/submission side, there would be similar tooling support on the build/integration side as well.