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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b0836b15fbsm144412615ad.81.2026.03.23.06.27.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Mar 2026 06:27:48 -0700 (PDT) Message-ID: Date: Mon, 23 Mar 2026 21:27:41 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm64: dts: qcom: glymur: add coresight nodes To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260318-add-coresight-dt-nodes-for-glymur-v2-1-d76e08f21fa5@oss.qualcomm.com> <7972211e-d735-4401-ada9-b83c7b96b612@oss.qualcomm.com> Content-Language: en-US From: Jie Gan In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: qhHCAUQ3e4JvJqjYSKzj6v3FntupMhoe X-Proofpoint-ORIG-GUID: qhHCAUQ3e4JvJqjYSKzj6v3FntupMhoe X-Authority-Analysis: v=2.4 cv=JcaxbEKV c=1 sm=1 tr=0 ts=69c13fd6 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=aLVIdYt9wyNXebfZDecA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzIzMDEwNCBTYWx0ZWRfX8e4Dm5o71zlp k1LydMeTxJC1nI3wvkZVdxoYSrjZCm8UVEDcn5OGaks+vnIXB802nZQHi6gi/pCbIataUdmbsY7 Am1EpgXb1Y6CNRxKuQ3MqVGFYNrzujv1O6Lysvhr0SzqaKV05pojP8U1+dADrX6r8zY0yMemr53 oVQ01P1GxsgVfx81YMdptCACqWB7Xn7BIdezBfJn9fW9biasxP36engtBlY9dduuHSBLdcNJLu0 Vz2ZIqdtFc9yJS3x7FYuoURxU+N9369Hlxp0tSerTMAMbfo8Y66ub0LvZ6aLM6JjXV1vZmMzZaT BcRij6CGoyHdwy5iG1nIBFC4h/hptfpbKdJg1ojlCVNth6YSM/XxwbMASc7g2tykaIHKULaIdg+ 5J4fO9og8PxGna+rdRiKYdpwWI2026w4CRmQEcDLvu+pHwKRxpxOYxMIZtTejbtpZUKbPlVnOnp 0/Y3QSodBYPy7fHYkwQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-23_04,2026-03-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 phishscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603230104 On 3/23/2026 9:02 PM, Konrad Dybcio wrote: > On 3/23/26 1:30 PM, Jie Gan wrote: >> >> >> On 3/23/2026 7:05 PM, Konrad Dybcio wrote: >>> On 3/18/26 12:42 PM, Jie Gan wrote: >>>> Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF. >>>> These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and >>>> some small subsystems, such as GCC, IPCC, PMU and so on. >>>> >>>> Signed-off-by: Jie Gan >>>> --- >>>> Changes in V2: >>>> 1. removed two cti devices due to GFX block is down >>> >>> i.e. "because GPU is not yet enabled"? >> >> Yeah, these CTI devices have clock issue for enabling due to the GPU block is not yet enabled. > > Do they need the GPU to be online, or a clock from GPU_CC, or > maybe something else? We need a specific debug clock inside the GPU block. The debug clock only can be enabled while GPU is online. Also needs AOP to support enable/disable the debug clock. > >>>>     - cti@11c42000 >>>>     - cti@11c4b000 >>>> 2. changes two TPDM devices to static: >>>>     - tpdm-cdsp-cmsr >>>>     - tpdm-cdsp-cmsr2 >>> >>> They were TPDM instances in v1. What's the reason for the change? >> >> These TPDMs havent clock source for accessing registers. We only need enable its ports to output trace data. So I have changed them to static-TPDM compatible. > > The registers are clearly physically there. Are you saying that we > (currently?) can't enable the clock required to access them? Or is > there a design defect that's preventing us from doing so? It's about hardware design. Some of the TPDM devices are designed as static, means we dont need access the register of the device for configuring. The trace data of the static TPDM is enabled by default, we only need enable the port of the connected TPDA device for receiving the data. I have tested these devices with Jtag attached, so I didnt observe issue about these new devices in the CDSP block. (Jtag will provide debug capability for all debug devices) Also cross-checked with hardware team for confirming these devices are working as static. Thanks, Jie > > Konrad >