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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6187d96a320sm385968a12.4.2025.08.13.05.07.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Aug 2025 05:07:17 -0700 (PDT) Message-ID: Date: Wed, 13 Aug 2025 14:07:14 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities To: Krzysztof Kozlowski , Sarthak Garg , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Adrian Hunter Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_cang@quicinc.com, quic_nguyenb@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com, quic_bhaskarv@quicinc.com, kernel@oss.qualcomm.com References: <20250801084518.2259767-1-quic_sartgarg@quicinc.com> <20250801084518.2259767-5-quic_sartgarg@quicinc.com> <69f2807c-9a28-4b31-97cc-2756f0ab9fd4@kernel.org> <8b023e56-435b-43df-8b15-c562a494e06f@kernel.org> <4091c488-996c-4318-82ad-c054a9ef5a22@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDEwNyBTYWx0ZWRfX5IHU4tGh+hoA wV+SM9ncnkF5zJtroLvOl/JUSovaFBRrlMs+tuUZqlj+RAmxgSU660zFR25HwMA3W3ap7GtHvJO AmYxXp3nhmTtENGAMn6auSxOQjuaP56lTPgnnFSmPXdkKKI48w4kRMc+ENHvpePzkjO1pFMJxzn Ma5HA5Usmr136JC/7gU9iqdI6MSYwf+CZCjAxkT7pMJkmjx6mg8VTT/f14g6t+OFgAs//Gz/OND ZG1b1DawMU2tQ5IcSsC0sZDm2GHkElztNe6sP3rH0YPhbngEEstb/e2IMhAnYWoz0cRjfUZV3hs Xgs2i3uObnMsWzU8dJHpSwZWijTQzJbyvfP6QYsDe6SqRazh92R2eWQt5sl4pq+IE+UcTXKRE28 RGmohM29 X-Proofpoint-GUID: 4Tr11oHk28xa29TXz4JJtGQy5Wdc5P31 X-Authority-Analysis: v=2.4 cv=A+1sP7WG c=1 sm=1 tr=0 ts=689c7ff7 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=RWzb36qre9bUkXLxNJYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 4Tr11oHk28xa29TXz4JJtGQy5Wdc5P31 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-13_01,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 spamscore=0 phishscore=0 clxscore=1015 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110107 On 8/13/25 1:56 PM, Krzysztof Kozlowski wrote: > On 13/08/2025 13:21, Konrad Dybcio wrote: >> On 8/13/25 1:08 PM, Sarthak Garg wrote: >>> >>> >>> On 8/5/2025 2:55 PM, Krzysztof Kozlowski wrote: >>>> On 05/08/2025 11:19, Sarthak Garg wrote: >>>>> >>>>> >>>>> On 8/1/2025 2:32 PM, Krzysztof Kozlowski wrote: >>>>>> On 01/08/2025 10:45, Sarthak Garg wrote: >>>>>>> The kernel now handles level shifter limitations affecting SD card >>>>>>> modes, making it unnecessary to explicitly disable SDR104 and SDR50 >>>>>>> capabilities in the device tree. >>>>>>> >>>>>>> However, due to board-specific hardware constraints particularly related >>>>>>> to level shifter in this case the maximum frequency for SD High-Speed >>>>>>> (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD >>>>>>> card in HS mode. This is achieved using the max-sd-hs-frequency property >>>>>>> in the board DTS. >>>>>>> >>>>>>> Signed-off-by: Sarthak Garg >>>>>>> --- >>>>>>>    arch/arm64/boot/dts/qcom/sm8550-hdk.dts                     | 1 + >>>>>>>    arch/arm64/boot/dts/qcom/sm8550-mtp.dts                     | 1 + >>>>>>>    arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + >>>>>>>    arch/arm64/boot/dts/qcom/sm8550.dtsi                        | 3 --- >>>>>>>    4 files changed, 3 insertions(+), 3 deletions(-) >>>>>>> >>>>>> >>>>>> This will break MMC for all of the users and nothing in commit msg or >>>>>> cover letter explains that or mentions merging strategy. >>>>>> >>>>>> Exactly this case is covered by your internal guideline, no? Please read it. >>>>>> >>>>>> Best regards, >>>>>> Krzysztof >>>>> >>>>> Just to make sure I’m addressing the right concern — are you primarily >>>>> worried about the introduction of the max-sd-hs-frequency property in >>>>> the board DTS files, or about the removal of the sdhci-caps-mask >>>>> from the common sm8550.dtsi? >>>> >>>> >>>> Apply this patch and test MMC. Does it work? No. Was it working? Yes. >>>> >>>> >>>> Best regards, >>>> Krzysztof >>> >>> >>> You're absolutely right to raise the concern about potential breakage. >>> After conducting additional testing across multiple boards, I’ve confirmed that the removal of SDR104/SDR50 broken capabilities does indeed affect V1 SM8550 devices. >> >> v1 is a prototype revision, please forget it exists, we most definitely >> do not support it upstream > > > You should double check. SM8450 (not v1!) needed it, so either it was > copied to SM8550 (v2!) by mistake or was also needed. I believe that the speed capabilities are indeed restricted on 8550-final and that's why this patchset exists in the first place Konrad